
TSC21020F
Rev. E – Oct. 05, 1998
4
Development System
The TSC21020F is supported with a complete set of
software and hardware development tools from Analog
Devices. The ADSP-21000 Family Development System
from Analog Devices includes development software, an
evaluation board and an in-circuit emulator.
D Assembler
Creates relocatable, COFF (Common Object File
Format) object files from ADSP-21xxx assembly
source code. It accepts standard C preprocessor
directives for conditional assembly and macro
processing. The algebraic syntax of the ADSP-21xxx
assembly language facilitates coding and debugging
of DSP algorithms.
D Linker/Librarian
The Linker processes separately assembled object
files and library files to create a single executable
program. It assigns memory locations to code and to
data in accordance with a user-defined architecture
file that describes the memory and I/O configuration
of the target system. The Librarian allows you to
group frequently used object files into a single library
file that can be linked with your main program.
D Simulator
The Simulator performs interactive, instruction-level
simulation of ADSP-21xxx code within the hardware
configuration described by a system architecture file.
It flags illegal operations and supports full symbolic
disassembly. It provides an easy-to-use, window
oriented, graphical user interface that is identical to
the one used by the ADSP- 21020 EZ-ICE Emulator.
Commands are accessed from pull-down menus with
a mouse.
D PROM Splitter
Formats an executable file into files that can be used
with an industry-standard PROM programmer.
D C Compiler and Runtime Library
The C Compiler complies with ANSI specifications.
It takes advantage of the TSC21020F’s high-level
language architectural features and incorporates
optimizing algorithms to speed up the execution of
code. It includes an extensive runtime library with
over 100 standard and DSP-specific functions.
D C Source Level Debugger
A full-featured C source level debugger that works
with the simulator or EZ-ICE emulator to allow
debugging of assembler source, C source, or mixed
assembler and C.
D Numerical C Compiler
Supports ANSI Standard (X3J11.1) Numerical C as
defined by the Numeric C Extensions Group. The
compiler
accepts
C
source
input
containing
Numerical C extensions for array selection, vector
math operations, complex data types, circular
pointers, and variably dimensioned arrays, and
outputs ADSP-21xxx assembly language source code.
D ADSP- 21020 EZ-LAB Evaluation Board
The EZ-LAB Evaluation Board is a general-purpose,
standalone TSC21020F system that includes 32K
words of program memory and 32K words of data
memory as well as analog I/O. A PC RS-232
download path enables the user to download and run
programs directly on the EZ-LAB. In addition, it may
be used in conjunction with the EZ-ICE Emulator to
provide a powerful software debug environment.
D ADSP- 21020 EZ-ICE Emulator
This in-circuit emulator provides the system designer
with a PC-based development environment that
allows nonintrusive access to the TSC21020F’s
internal registers through the processor’s 5-pin JTAG
Test Access Port. This use of on-chip emulation
circuitry enables reliable, full-speed performance in
any target. The emulator uses the same graphical user
interface as the ADSP- 21020 Simulator, allowing an
easy transition from software to hardware debug. (See
“Target System Requirements for Use of EZ-ICE
Emulator” on page 27.)
REZ-LAB and EZ-ICE are registered trademarks of Analog Devices, Inc.
Additional Information
This data sheet provides a general overview of
TSC21020F functionality. For additional information on
the architecture and instruction set of the processor, refer
to the ADSP-21020 User’s Manual. For development
system and programming reference information, refer to
the ADSP-21000 Family Development Software Manuals
and the ADSP-21020 Programmer’s Quick Reference.