參數(shù)資料
型號(hào): TSA1204IFT-E
廠商: STMICROELECTRONICS
元件分類: ADC
英文描述: 2-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48
封裝: 7 X 7 MM, PLASTIC, TQFP-48
文件頁數(shù): 19/31頁
文件大小: 435K
代理商: TSA1204IFT-E
Definitions of specified parameters
TSA1204
26/31
SINAD2Ao=6.02 × ENOB + 1.76 dB + 20 log (2A0/FS)
The ENOB is expressed in bits.
Analog input bandwidth
The maximum analog input frequency at which the spectral response of a full power signal
is reduced by 3 dB. Higher values can be achieved with smaller input levels.
Effective resolution bandwidth (ERB)
The band of input signal frequencies that the ADC is intended to convert without loosing
linearity i.e. the maximum analog input frequency at which the SINAD is decreased by 3 dB
or the ENOB by 1/2 bit.
Pipeline delay
Delay between the initial sample of the analog input and the availability of the corresponding
digital data output, on the output bus. Also called data latency. It is expressed as a number
of clock cycles.
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