參數(shù)資料
型號(hào)： TS68EN360DES02MYAL
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： 32-bitQuad Integrated Communication Controller
中文描述： RISC PROCESSOR, CQFP240
封裝： CAVITY DOWN, CERQUAD-240
文件頁數(shù)： 10/82頁
文件大小： 874K
代理商： TS68EN360DES02MYAL
10
TS68EN360
2113A–HIREL–03/02
Scope
ThisdrawingdescribesthespecificrequirementsforthemicrocontrollerTS68EN360-
25MHzand33MHzincompliancewithMIL-STD-883classBorAtmelstandard
screening.
Applicable
Documents
MIL-STD-883
1.
2.
3.
MIL-STD-883:testmethodsandproceduresforelectronics.
MIL-PRF-38535:generalspecificationsformicrocircuits.
DESC5962-SMD-97607
SI
SIReceiveData
L1RXDA,L1RXDB
Serialinputtothetimedivisionmultiplexed(TDM)channelA
orchannelB.
SITransmitData
L1TXDA,L1TXDB
SerialoutputfromtheTDMchannelAorchannelB.
SIReceiveClock
L1RCLKA,L1RCLKB
InputreceiveclocktoTDMchannelAorchannelB.
SITransmitClock
L1TCLKA,L1TCLKB
InputtransmitclocktoTDMchannelAorchannelB.
SITransmitSyncSignals
L1TSYNCA,
L1TSYNCB
InputtransmitdatasyncsignaltoTDMchannelAor
channel B.
SIReceiveSyncSignals
L1RSYNCA,
L1RSYNCB
InputreceivedatasyncsignaltoTDMchannelAor
channel B.
IDLInterfaceRequest
L1RQA,L1RQB
IDLinterfacerequesttotransmitontheDchannel.Output
fromtheSI.
SIOutputClock
L1CLKOA,L1CLKOB
Outputserialdatarateclock.Canoutputadatarateclock
whentheinputclockis2xthedatarate.
SIDataStrobes
L1ST4-L1ST1
Serialdatastrobeoutputscanbeusedtogateclocksto
externaldevicesthatdonothaveabuilt-intimeslotassigner
(TSA).
BRG
BaudRateGenerator
Out 4-1
BRGO4-BRGO1
Baudrategeneratoroutputclockallowsbaudrategenerator
tobeusedexternally.
BRGInputClock
CLK2,CLK6
BaudrategeneratorinputclockfromwhichBRGwillderive
thebaudrates.
PIP
PortB15-0
PB15-BP0
PIPDataI/OPins.
StrobeOut
STRBO
ThisinputcausesthePIPoutputdatatobeplacedonthe
PIPdatapins.
StrobeIn
STRBI
ThisinputcausesdataonthePIPdatapinstobelatchedby
thePIPasinputdata.
SDMA
SDMAAcknowledge2-1
SDACK2-SDACK1
SDMAoutputsignalsusedinRISCreceivertomarkfieldsin
theEthernetreceiveframe.
Table2.
PeripheralsSignalIndex(Continued)
Group
SignalName
Mnemonic
Function
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參數(shù)描述
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