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參數(shù)資料
| 型號(hào)： | TS5070FN |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | Codec |
| 英文描述： | PROGRAMMABLE CODEC/FILTER COMBO 2ND GENERATION |
| 中文描述： | 可編程解碼器/濾鏡組合第二代 |
| 文件頁數(shù)： | 5/32頁 |
| 文件大?。?/td> | 284K |
| 代理商： | TS5070FN |
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TRANSMIT SECTION
Name
Pin
Type
TS5070
FN
TS5071
N
Function
Description
FS
X
I
22
15
Transmit
Frame Sync.
Normally apulse or squarewave waveform withan 8 kHz
repetition rate is applied to this inputto definethe startof
the transmit time-slot assigned to this device (non-delayed
data mode) or the start of the transmit frame (delayed
data mode using the internal time-slot assignment
counter).
VF
X
I
I
28
20
Transmit
Analog
This is a high–impedance input. Voicefrequency signals
present on this input are encoded as an A–law or
μ
–law
PCM bit stream and shifted out on the selected D
X
pin.
D
X
0
D
X
1
0
0
18
19
13
–
Transmit Data
D
X
1 is available on theTS5070 only, D
X
0 is available on
all devices. These transmit data TRI–STATE
outputs
remain in the high impedance state except during the
assigned transmit time–slot on the assigned port, during
which the transmit PCM data byte is shifted out on the
rising edges of BCLK.
TS
X
0
TS
X
1
0
0
20
21
14
–
Transmit
Time–slot
TS
X
1 is available on the TS5070 only.
TS
X
0 is available on all devices. Normally these opendrain
outputs are floating in a high impedance state except
when a time–slotis activeon one of the D
X
outputs, when
the apppropriate TS
X
output pulls low to
enable a backplane line–driver. Should be strapped to
ground (GND) when not used.
RECEIVE SECTION
Name
Pin
Type
TS5070
FN
TS5071
N
Function
Description
FS
R
I
8
6
Receive Frame
Sync.
Normally apulse or squarewave waveform withan 8 kHz
repetition rate is applied to this inputto definethe startof
the receive time–slot assigned to this device (non-delayed
frame mode) or the startof the receive frame (delayed
frame mode using the internal time-slot assignment
counter.
VF
R
0
0
2
2
Receive Analog
The receive analog power amplifier output, capable of
driving load impedances as low as 300
(depending on
the peak overload levelrequired). PCM datareceived on
the assigned D
R
pin is decoded and appears at this output
as voice frequency signals.
D
R
0
D
R
1
I
I
10
9
7
–
Receive Data
D
R
1 is availableon the TS5070 only, D
R
0 isavailable on
all devices. These receive data input(s)are inactive
except during the assignedreceive time–slot of the
assigned port when the receive PCM data is shifted inon
the falling edges of BCLK.
TS5070 - TS5071
5/32
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TS5070FNTR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:PROGRAMMABLE CODEC/FILTER COMBO 2ND GENERATION |
| TS5071 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:PROGRAMMABLE CODEC/FILTER COMBO 2ND GENERATION |
| TS5071J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:A-Law/u-Law CODEC |
| TS5071N | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:PROGRAMMABLE CODEC/FILTER COMBO 2ND GENERATION |
| TS507CD | 功能描述:精密放大器 Hi precision op amp RoHS:否 制造商:Maxim Integrated 每芯片的通道數(shù)量: 輸入補(bǔ)償電壓:0.25 mV at +/- 5 V 輸入電壓范圍（最大值）: 安裝風(fēng)格: 封裝 / 箱體:SOIC-8 Narrow 封裝:Tube |
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