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參數(shù)資料
| 型號： | TRF5001GQE |
| 英文描述： | RECEIVER|BICMOS|BGA|80PIN|PLASTIC |
| 中文描述： | 接收機(jī)| BICMOS工藝| BGA封裝| 80腳|塑料 |
| 文件頁數(shù)： | 13/19頁 |
| 文件大?。?/td> | 258K |
| 代理商： | TRF5001GQE |
SLWS084 – DECEMBER 2000
13
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
Table 7. Serial Word 7 Format
DATA
FIELD
WORD
PARAMETER
BITS
DESCRIPTION/CONDITIONS
OB
7
OUTBUFEN
1
1 = enable prescaler output buffer
0 = disable prescaler output buffer
AB
7
ENAADBYP
1
1 = enable bypass ADC
0 = disable bypass ADC
CT
7
CLKTESTENA
1
1 = enable internal ADC clock test
0 = disable internal ADC clock test
PL
7
ENA_LOCK
1
1 = enable PLLLOCK switch
0 = disable PLLLOCK switch
FO
7
ENTFILTOUT
1
1 = enable LPF output buffer
0 = disable LPF output buffer
MO
7
ENTMIX2OUT
1
1 = enable IFMIXER output buffer
0 = disable IFMIXER output buffer
AO
7
ENTVGAOUT
1
1 = enable AGC output buffer
0 = disable AGC output buffer
EV
7
EXTVCO
1
1 = enable external VCO input
0 = disable external VCO input
LT
7
ENALPFTUNE
1
1 = enable LPF tuning circuit
0 = disable LPF tuning circuit
LDW
7
DACWORD
5
5-bit LPF tuning DAC word. The LPF tuning DAC word is used when ENALPFTUNE is
low.
PS
7
PREAMP_PS
1
1 = normal mode for preamp ADC (default)
0 = low current mode for preamp ADC
LS
7
LATCH_PS
1
1 = normal mode for latch ADC (default)
0 = low current mode for latch ADC
P
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