參數(shù)資料
型號(hào)： TRCV0110G
英文描述： ATM/SONET DEMULTIPLEXER|BIPOLAR|BGA|177PIN|PLASTIC
中文描述： 的ATM / SONET的分路器|雙極|的BGA | 177PIN |塑料
文件頁數(shù)： 2/26頁
文件大?。?/td> 476K
代理商： TRCV0110G
Table of Contents
Contents
Page
2
Agere Systems Inc.
Data Sheet
March 28, 2002
Clock Recovery, 1:16 Data Demultiplexer
TRCV0110G 10 Gbits/s Limiting Amplifier
Features ....................................................................................................................................................................1
Applications...............................................................................................................................................................1
Description.................................................................................................................................................................1
Block Diagram.........................................................................................................................................................3
Ball Information..........................................................................................................................................................4
CBGA Diagram .......................................................................................................................................................4
Ball Assignments ....................................................................................................................................................5
Ball Description.......................................................................................................................................................7
Functional Overview................................................................................................................................................11
FEC Rate Support...................................................................................................................................................11
High-Speed Data Inputs..........................................................................................................................................11
Limiting Amplifier Operation..................................................................................................................................11
Loopback Data Input.............................................................................................................................................12
Clock Recovery Operation.......................................................................................................................................12
CDR Input Jitter Tolerance......................................................................................................................................13
PLL Lock Indication.................................................................................................................................................14
Demultiplexer Operation..........................................................................................................................................16
Demultiplexer Data Mute (MUTEDMXN) ..............................................................................................................16
CK622P/N Output Mute (MUTE622N)..................................................................................................................16
CKOP/N Output Frequency Select (FREQCKO) ..................................................................................................16
CKOP/N Output Mute (MUTECKON) ...................................................................................................................16
Reset (RESETN)...................................................................................................................................................16
Absolute Maximum Ratings.....................................................................................................................................17
Handling Precautions ..............................................................................................................................................17
Recommended Operating Conditions .....................................................................................................................17
Electrical Characteristics.........................................................................................................................................18
LVDS, CMOS, and CML Input and Output Pins ...................................................................................................18
Timing Characteristics.............................................................................................................................................20
Output Timing .......................................................................................................................................................20
Reference Frequency (REFCLKP/N, REFFREQ) (Standard SONET Rate).........................................................21
Reference Frequency (REFCLKP/N, REFFREQ) (FEC Rate) .............................................................................21
Reference Frequency (REFCLKP/N, REFFREQ) (Ethernet Rate).......................................................................21
Packaging Characteristics.......................................................................................................................................22
Package Crush Characteristics.............................................................................................................................22
CBGA Package Information..................................................................................................................................22
PWB Design Information.......................................................................................................................................22
Assembly Information ...........................................................................................................................................23
Reference Materials..............................................................................................................................................23
Package Diagram—177-Ball CBGA (Bottom View)..............................................................................................24
Ordering Information................................................................................................................................................25
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