參數(shù)資料
型號： TPS56300PWPR
廠商： TEXAS INSTRUMENTS INC
元件分類： 穩(wěn)壓器
英文描述： 2 A DUAL SWITCHING CONTROLLER, 400 kHz SWITCHING FREQ-MAX, PDSO28
封裝： GREEN, PLASTIC, HTSSOP-28
文件頁數(shù)： 4/39頁
文件大?。?/td> 1063K
代理商： TPS56300PWPR
TPS56300
DUALOUTPUT LOW INPUT VOLTAGE
DSP POWER SUPPLY CONTROLLER WITH SEQUENCING
SLVS261B DECEMBER 1999 SEPTEMBER 2000
12
www.ti.com
electrical characteristics TJ = 40° to 125°C, VCC = 2.8 V to 5.5 V (unless otherwise noted)
output drivers (see Note 5)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Duty cycle < 2%,
tpw < 100 us,
VBOOT – VBOOTLO = 4.5V,
VHIGHDR = 4V (sink),
See Note 2 and Figure 15
0.7
2
Peak output current
Duty cycle < 2%,
tpw < 100 us,
VBOOT – VBOOTLO = 4.5V,
VHIGHDR = 0.5V (src),
See Note 2 and Figure 15
1.2
2
A
Peak output current
Duty cycle < 2%,
tpw < 100
s,
VDRV = 4.5 V,
VLOWDR = 4 V (sink)
See Note 2 and Figure 15
1.3
2
A
Duty cycle < 2%,
tpw < 100 us,
VDRV = 4.5 V,
VLOWDR = 0.5 V (src),
See Note 2 and Figure 15
1.4
2
VBOOT – VBOOTLO = 4.5 V, VHIGHDR = 0.5 V
See Note 2
5
Output resistance
VBOOT – VBOOTLO = 4.5V, VHIGHDR = 4 V,
See Note 2
45
VDRV = 4.5V,
VLOWDR = 0.5V,
See Note 2
9
VDRV = 4.5V,
VLOWDR = 4V,
See Note 2
45
HIGHDR rise/fall time (see Note 7)
Cl = 3.3 nF,
VBOOT= 4.5V,
VBOOTLO=grounded
60
ns
LOWDR rise/fall time (see Note 7)
Cl = 3.3 nF,
VDRV= 4.5V
40
ns
INHIBIT grounded,
VIN < UVLO; VBOOT=6V,
BOOTLO grounded
10
A
High-side driver quiescent current
INHIBIT connected to +5 V,
VIN > UVLO
Fswx = 200KHz,
VBOOT = 5.5 V,
BOOTLO = 0
CHIGHDR = 50 pF
See Note 2
2
mA
NOTES:
2. Ensured by design, not production tested.
5. The pullup/pulldown circuits of the drivers are bipolar and MOSFET transistors in parallel. The peak output current rating is the
combined current from the bipolar and MOSFET transistors. The output resistance is the Rds(on) of the MOSFET transistor when
the voltage on the driver output is less than the saturation voltage of the bipolar transistor.
LDO N-channel output driver
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Peak output current
VLDODRV = 7.5V,
VNDRV=3 V(src),
VIOSENSE = 0.9 × VLDOREF,
See Note 2
190
200
A
Peak output current
VLDODRV = 7.5V,
VNDRV=0 V(snk),
VIOSENSE = 1.1 × VLDOREF,
See Note 2
1.5
mA
Open loop voltage gain
(VNGATELDO / VSENSELDO )
VIN = 5.5 V,
7.5 V
≥ VNGATELDO ≥ 0.5 V,
See Note 2
3000
(70)
V/V
(dB)
Power supply ripple rejection
f=1 kHz,
CO=10 F,
TJ=125 °C,
5.5 V
≥ VIN ≥ 2.55 V, See Note 2
60
dB
NOTE 2. Ensured by design, not production tested.
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