參數(shù)資料
型號(hào): TPS55386PWPR
廠商: TEXAS INSTRUMENTS INC
元件分類: 穩(wěn)壓器
英文描述: 7 A DUAL SWITCHING CONTROLLER, 600 kHz SWITCHING FREQ-MAX, PDSO16
封裝: PLASTIC, HTSSOP-26
文件頁數(shù): 3/45頁
文件大?。?/td> 1197K
代理商: TPS55386PWPR
www.ti.com ......................................................................................................................................................................................... SLUS818 – SEPTEMBER 2008
TERMINAL FUNCTIONS (continued)
TERMINAL
I/O
DESCRIPTION
NAME
NO.
Power input to the Output 1 high side MOSFET only. This pin should be locally bypassed to GND with a
PVDD1
1
I
low ESR ceramic capacitor of 10-
F or greater.
The PVDD2 pin provides power to the device control circuitry, provides the pull-up for the EN1 and EN2
pins and provides power to the Output 2 high-side MOSFET. This pin should be locally bypassed to
PVDD2
16
I
GND with a low ESR ceramic capacitor of 10-
F or greater. The UVLO function monitors PVDD2 and
enables the device when PVDD2 is greater than 4.1 V.
This pin configures the output startup mode. If the SEQ pin is connected to BP, then when Output 2 is
enabled, Output 1 is allowed to start after Output 2 has reached regulation; that is, sequential startup
where Output 1 is slave to Output 2. If EN2 is allowed to go high after the outputs have been operating,
then both outputs are disabled immediately, and the output voltages decay according to the load that is
present. For this sequence configuration, tie EN1 to ground.
If the SEQ pin is connected to GND, then when Output 1 is enabled, Output 2 is allowed to start after
Output 1 has reached regulation; that is, sequential startup where Output 2 is slave to Output 1. If EN1
is allowed to go high after the outputs have been operating, then both outputs are disabled immediately,
SEQ
12
I
and the output voltages decay according to the load that is present. For this sequence configuration, tie
EN2 to ground.
If left floating, Output 1 and Output 2 start ratio-metrically when both outputs are enabled at the same
time. They will soft start at a rate determined by their final output voltage and enter regulation at the
same time. If the EN1 and EN2 pins are allowed to operate independently, then the two outputs also
operate independently
NOTE: An internal two resistor (150-k
each) divider connects BP to SEQ and to GND. See the
Source (switching) output for Output 1 PWM. A snubber is recommended to reduce ringing on this
SW1
3
O
node. See SW Node Ringing for further information.
Source (switching) output for Output 2 PWM. A snubber is recommended to reduce ringing on this
SW2
14
O
node. See SW Node Ringing for further information.
Thermal Pad
-
This pad must be tied externally to a ground plane and the GND pin.
Copyright 2008, Texas Instruments Incorporated
11
Product Folder Link(s): TPS55383 TPS55386
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