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參數(shù)資料
| 型號： | TPS3836H30DBVTG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5 |
| 封裝： | GREEN, PLASTIC, SOT-23, 5 PIN |
| 文件頁數(shù)： | 17/22頁 |
| 文件大?。?/td> | 0K |
| 代理商： | TPS3836H30DBVTG4 |
TPS3836
TPS3837
TPS3838
SLVS292E – JUNE 2000 – REVISED OCTOBER 2010
www.ti.com
SWITCHING CHARACTERISTICS
At TA = +25°C, RL = 1 M, and CL = 50 pF, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VDD ≥ VIT + 0.2 V, MR = 0.7 × VDD,
5
10
15
CT = GND, (See Timing Diagram)
tD
Delay time
ms
VDD ≥ VIT + 0.2 V, MR = 0.7 × VDD,
100
200
300
CT = VDD, (See Timing Diagram)
VDD to RESET
VIL = VIT – 0.2 V, VIH = VIT + 0.2 V
10
Propagation (delay) time,
tPHL
delay (TPS3836,
ms
high-to-low-level output
VIL = 1.6 V
50
TPS3838)
VIL = VIT – 0.2 V, VIH = VIT + 0.2 V
10
Propagation (delay) time,
VDD to RESET
tPLH
ms
low-to-high-level output
delay (TPS3837)
VIL = 1.6 V
50
MR to RESET
Propagation (delay) time,
VDD ≥ VIT + 0.2 V, VIL = 0.3 × VDD, VIL
tPHL
delay (TPS3836,
0.1
ms
high-to-low-level output
= 0.7 × VDD
TPS3838)
Propagation (delay) time,
MR to RESET
VDD ≥ VIT + 0.2 V, VIL = 0.3 × VDD,
tPLH
0.1
ms
low-to-high-level output
delay (TPS3837)
VIL = 0.7 × VDD
TIMING REQUIREMENTS
At TA = +25°C, RL = 1 M, and CL = 50 pF, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
at VDD
VIH = VIT + 0.2 V, VIL = VIT – 0.2 V
6
tW
Pulse width
ms
at MR
VDD ≥ VIT + 0.2 V, VIL = 0.3 × VDD, VIH = 0.7 × VDD
1
4
Copyright 2000–2010, Texas Instruments Incorporated
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| TPS3836J25DBVRG4 | 功能描述:監(jiān)控電路 220nA w/ 10ms/200ms Select delay time RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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