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| 型號： | TPS3613-18DGST |
| 英文描述： | Analog IC |
| 中文描述： | 模擬IC |
| 文件頁數(shù)： | 10/16頁 |
| 文件大小： | 214K |
| 代理商： | TPS3613-18DGST |
TPS3600D20, TPS3600D33, TPS3600D50
BATTERY-BACKUP SUPERVISORS FOR LOW-POWER PROCESSORS
SLVS336 – DECEMBER 2000
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
detailed description (continued)
watchdog
In a microprocessor- or DSP-based system, it is not only important to supervise the supply voltage, it is also
important to ensure the correct program execution. The task of a watchdog is to ensure that the program is not
stalled in an indefinite loop. The microprocessor, microcontroller, or the DSP have to toggle the watchdog input
within typically 0.8 s to avoid a time-out from occurring. Either a low-to-high or a high-to-low transition resets
the internal watchdog timer. If the input is unconnected the watchdog is disabled and will be retriggered
internally.
saving current while using the watchdog
The watchdog input is internally driven low during the first 7/8 of the watchdog time-out period, then momentarily
pulses high, resetting the watchdog counter. For minimum watchdog input current (minimum overall power
consumption), leave WDI low for the majority of the watchdog time-out period, pulsing it low-high-low once
within 7/8 of the watchdog time-out period to reset the watchdog timer. If instead, WDI is externally driven high
for the majority of the time-out period, a current of e.g. 5 V/40 k
≈
125
μ
A can flow into WDI.
VIT
WDI
RESET
td
td
Time-Out
VOUT
VBAT
Figure 5. Watchdog Timing
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