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參數(shù)資料
| 型號： | TPS2301PW |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | DUAL HOT SWAP POWER CONTROLLER WITH INDEPENDENT CIRCUIT BREAKER AND POWER-GOOD REPORTING |
| 中文描述： | 雙熱插拔電源與獨立斷路器及功率控制器，高質(zhì)量的報告 |
| 文件頁數(shù)： | 18/22頁 |
| 文件大?。?/td> | 422K |
| 代理商： | TPS2301PW |
TPS2300, TPS2301
DUAL HOT SWAP POWER CONTROLLER WITH INDEPENDENT
CIRCUIT BREAKER AND POWER-GOOD REPORTING
SLVS265B – FEBRUARY 2000 – REVISED APRIL 2000
18
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
setting the power good threshold voltage
The two feedback resistors R
VSENSEx_TOP
and R
VSENSEx_BOT
connected between V
Ox
and ground form a
resistor divider setting the voltage at the VSENSEx pins. VSENSE1 voltage equals to
V
I(SENSE1)
= V
O
×
R
VSENSE1_BOT
/(R
VSENSE1_TOP
+ R
VSENSE1_BOT
)
This voltage is compared to an internal voltage reference (1.225 V
±
2%) to determine whether the output voltage
level is within a specified tolerance. For example, given a nominal output voltage at V
O1
, and defining V
O1_min
as the minimum required output voltage, then the feedback resistors are defined by:
R
VSENSE1_TOP
V
O1_min
1.225
1.225
R
VSENSE1_BOT
Start the process by selecting a large standard resistor value for R
VSENSE1_BOT
to reduce power loss. Then
R
VSENSE1_TOP
can be calculated by nserting all of the known values nto the equation above. When V
O1
s ower
than V
O1_min
, PWRGD1 will be low as long as the controller is enabled.
undervoltage lockout (UVLO)
The TPS2300/01 includes an undervoltage lockout (UVLO) feature that monitors the voltage present on the
VREG pin. This feature will disable both external MOSFETs if the voltage on VREG drops below 2.78 V
(nominal) and will re-enable normal operation when it rises above 2.85 V (nominal). Since VREG is fed from
IN1 through a low-dropout voltage regulator, the voltage on VREG will track the voltage on IN1 within 50 mV.
While the undervoltage lockout is engaged, both GATE1 and GATE2 are held low by internal PMOS pulldown
transistors, ensuring that the external MOSFET transistors remain off at all times, even if all power supplies have
fallen to 0 V.
single-channel operation
Some applications may require only a single external MOS transistor. Such applications should use GATE1 and
the associated circuitry (IN1, ISENSE1, ISET1, DISCH1). The IN2 pin should be grounded to disable the
circuitry associated with the GATE2 pin. The VSENSE2 and PWRGD2 circuitry is unaffected by disabling
GATE2, and may still be used if so desired.
power-up control
The TPS2300/01 includes a 500
μ
s (nominal) startup delay that ensures that internal circuitry has sufficient time
to start before the device begins turning on the external MOSFETs. This delay is triggered only upon the rapid
application of power to the circuit. If the power supply ramps up slowly, the undervoltage lockout circuitry will
provide adequate protection against undervoltage operation.
3-channel hot-swap application
Some applications require hot-swap control of up to three voltage rails, but may not explicitly require the sensing
of the status of the output power on all three of the voltage rails. One such application is device bay, where dv/dt
control of 3.3 V, 5 V, and 12 V is required. By using channel 2 to drive both the 3.3-V and 5-V power rails and
channel 1 to drive the 12-V power rail, as is shown below, TPS2300/01 can deliver three different voltages to
three loads while monitoring the status of two of the loads.
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