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參數(shù)資料
| 型號(hào)： | TOSCA |
| 英文描述： | TOSCA (STLC60134 STLC60135) ADSL MODEM CHIP SET |
| 中文描述： | 托斯卡（STLC60134 STLC60135）ADSL調(diào)制解調(diào)器芯片組 |
| 文件頁(yè)數(shù)： | 3/7頁(yè) |
| 文件大?。?/td> | 62K |
| 代理商： | TOSCA |
Analog Front End (STLC60134)
HCMOS5A (0.5
μ
m) mixed digital and analog
technology has been chosen to produce this
component that embodies the analog functions of
the TOSCA. Automatic gain control amplifiers,
placed at the analog functions of the TOSCA.
Automatic gain control amplifiers, placed at the
analog interface of transmit and receive paths, al-
low for line’s high attenuationin order to keep ac-
ceptable noise level of the signal ADC’s and
DAC’s resolution, that is 12-bit wide with 8.8MHz
sampling rate. Thanks to the symmetrical archi-
tecture the same channel filter can be used as a
part of either the upstream or the downstream
path: ATU-C or ATU-Rend.
A built-in driver allows for single external clock
generation using a XTAL (ATU-C) or a VCXO
(ATU-R).
STLC60134Analog FrontEnd’s main features:
Rx automatic gain control: 0-31dB in 1dB
steps
Two input ports allow selection of RX signals,
e.g. withor without externalattenuation
Second transmit port available (i.e. echo can-
cellation)
Programmablelow pass and band pass filters
12-bit DAC and ADC, samplingat 8.832MHz
Xtal: 35.328MHz,
±
50ppm, the accuracy of the
frequencyis determinedby the ExternalXTAL
Direct connectionto STLC60135DTM modem
Error correction on ADC output
Testinterface for digital and analog sections
Analog anddigital loop back modes
Single 3.3V supply, or 3.3V analog and 3.0V
digital supplies
Power dissipation 0.4W
Power-down mode 0.1W
TQFP-64(10 x 10mm body, 0.5mm pitch)
DiscreteMultiToneDigitalModem(STLC60135)
The
DMT modem has
HCMOS6(0.35
μ
m) technology.
It performs PMD (Physycal Medium Dependant)
sub-layer and TC (Transmission Convergence)
sub-layer functions. In other words we can think
to split up the chip into two separate blocks: the
first one which carries out modem functions
(PMD sub layer) and a second one in charge of
ATM framing.
The chip is controlled and programmed by an ex-
ternal processor and is seen as a memory
mapped device.
been developed in
MODEM Functions
The modem part of the chip includes all the nec-
essary blocks needed for digitally DMT mapping
and demapping.A 14-bit code for everycarrier al-
lows constellationswith up to 16383 points.
Internallydigital filters carry out Time Equalization
to reduce the effects of the inter symbol inter-
faces. That is followed by Fast Fourier Transform
(in transmit direction an Inverse FFT is per-
formed) in order to change from time domain to
frequency domain.
Afterwards a
Equalization cuts down carrier by carrier the
channel distortion; signal’s amplitude attenuation
and phase rotation. By efficient algorithms, this
Frequency
Rx
DSP FE
TC SUBLAYER
CELL
BASED
FUNCT.
ADSL
AFE
Rx
INTERF.
D98TL406
Tx
DSP FE
FFT
DEMAPPER
VITERBI
R/S
DECODER
DE-
FRAMER
ATM (UTOPIA)
IFFT
MAPPER
VITERBI
SIGNAL
MONITORING &
FEQ UPDATE &
DPLL
PMD SUBLAYER
R/S
CODER
FRAMER
CELL
BASED
FUNCT.
Tx
INTERF.
INTERLEAVED
FAST
FAST
INTERLEAVED
Figure 3. DMT Modem block diagram.
TOSCA STLC60134/STLC60135
3/7
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