
SPRS457E
– MARCH 2009 – REVISED JUNE 2011
Table 2-5. Pin Descriptions (continued)
Name
BGA
Type
Group
Power
IPU
Reset
Description(4)
ID
(1)
Supply(2)
IPD(3)
State
PWCTRIO5
K5
I/O/Z
PRTCS
VDD18_PRTCSS
Input
PRTCSS: General Input / Output Signal 5
S
Power Management and Real Time Clock
Subsystem (PRTCSS).
PWCTRIO6
K4
I/O/Z
PRTCS
VDD18_PRTCSS
Input
PRTCSS: General Input / Output Signal 6
S
Power Management and Real Time Clock
Subsystem (PRTCSS).
PWCTRO0
K2
O
PRTCS
VDD18_PRTCSS
Output
PRTCSS: General Output Signal 0
S
Power Management and Real Time Clock
Subsystem (PRTCSS).
PWCTRO1
L5
O
PRTCS
VDD18_PRTCSS
Output
PRTCSS: General Output Signal 1
S
Power Management and Real Time Clock
Subsystem (PRTCSS).
PWCTRO2
L4
I/O/Z
PRTCS
VDD18_PRTCSS
Output
PRTCSS: General Output Signal 2
S
Power Management and Real Time Clock
Subsystem (PRTCSS).
PWCTRO3
L3
O
PRTCS
VDD18_PRTCSS
Output
PRTCSS: General Output Signal 3
S
Power Management and Real Time Clock
Subsystem (PRTCSS).
RTCXI
G1
I
PRTCS
VDD12_PRTCSS
Input
PRTCSS: Crystal Input for PRTCSS oscillator
S
Note: If the RTC calendar is not used, this pin should
be pulled down.
Power Management and Real Time Clock
Subsystem (PRTCSS).
RTCXO
H1
O
PRTCS
VDD12_PRTCSS
Output
PRTCSS: Crystal Output for PRTCSS oscillator
S
Note: If the RTC calendar is not used, this pin should
be left unconnected.
Power Management and Real Time Clock
Subsystem (PRTCSS).
PWRST
M3
I
PRTCS
VDD12_PRTCSS
Input
PRTCSS: Reset signal for PRTCSS
S
Power Management and Real Time Clock
Subsystem (PRTCSS).
PWRCNTON
M2
I
PRTCS
VDD12_PRTCSS
Input
PRTCSS: Reset pin for system power sequencing
S
RESET
H3
I
VDDS33
Input
Global chip reset
MXI1
L1
I
CLOCK
VDDMXI
Input
Crystal input for system oscillator
S
Note: If an external oscillator is to be used, the
external oscillator clock signal should be connected
to the MXI1 pin with a 1.8V amplitude. The MXO1
should be left unconnected and the VSS_MX1 signal
should be connected to board ground (Vss).
MXO1
K1
O
CLOCK
VDDMXI
Output
Output for system oscillator
S
Note: If an external oscillator is to be used, the
external oscillator clock signal should be connected
to the MXI1 pin with a 1.8V amplitude. The MXO1
should be left unconnected and the VSS_MX1 signal
should be connected to board ground (Vss).
TCK
F4
I
EMULA
VDDS33
IPU
Input
JTAG test clock input
TION
TDI
F5
I
EMULA
VDDS33
IPU
Input
JTAG test data input
TION
TDO
G4
O
EMULA
VDDS33
Output
JTAG test data output
TION
42
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2009–2011, Texas Instruments Incorporated