參數資料
型號： TMS320V642AGNZ6
廠商： Texas Instruments, Inc.
元件分類： 數字信號處理
英文描述： Video/Imaging Fixed-Point Digital Signal Processor
中文描述： 視頻/影像定點數字信號處理器
文件頁數： 112/123頁
文件大小： 1205K
代理商： TMS320V642AGNZ6
www.ti.com
6.9.7.3
Sequential Sampling Mode (Single-Channel) (SMODE = 0)
Analog Input on
Channel Ax or Bx
ADC Clock
Sample and Hold
SH Pulse
SMODE Bit
t
dschx_n
t
dschx_n+1
Sample n
Sample n+1
Sample n+2
t
SH
ADC Event Trigger from
ePWM or Other Sources
t
d(SH)
TMS320F2808, TMS320F2806
TMS320F2801, UCD9501
Digital Signal Processors
SPRS230F–OCTOBER 2003–REVISED SEPTEMBER 2005
In sequential sampling mode, the ADC can continuously convert input signals on any of the channels (Ax
to Bx). The ADC can start conversions on event triggers from the ePWM, software trigger, or from an
external ADCSOC signal. If the SMODE bit is 0, the ADC will do conversions on the selected channel on
every Sample/Hold pulse. The conversion time and latency of the Result register update are explained
below. The ADC interrupt flags are set a few SYSCLKOUT cycles after the Result register update. The
selected channels will be sampled at every falling edge of the Sample/Hold pulse. The Sample/Hold pulse
width can be programmed to be 1 ADC clock wide (minimum) or 16 ADC clocks wide (maximum).
Figure 6-23. Sequential Sampling Mode (Single-Channel) Timing
Table 6-39. Sequential Sampling Mode Timing
SAMPLE n
SAMPLE n + 1
AT 12.5 MHz
ADC CLOCK,
t
c(ADCCLK)
= 80 nS
REMARKS
t
d(SH)
Delay time from event trigger to
sampling
Sample/Hold width/Acquisition
Width
Delay time for first result to appear
in Result register
Delay time for successive results to
appear in Result register
2.5t
c(ADCCLK)
t
SH
(1 + Acqps) *
t
c(ADCCLK)
4t
c(ADCCLK)
80 ns with Acqps = 0
Acqps value = 0-15
ADCTRL1[8:11]
t
d(schx_n)
320 ns
t
d(schx_n+1)
(2 + Acqps) *
t
c(ADCCLK)
160 ns
112
Electrical Specifications
相關PDF資料
PDF描述
TMS320V642AZDK5 1A, 52kHz (250kHz Max) Current Mode PWM Control Circuit with 8.4V UVLO Threshold and 48% Max Duty Cycle; Package: 8 LEAD PDIP; No of Pins: 8; Container: Rail; Qty per Container: 50
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TMS320V642AZDK7 1A, 52kHz (250kHz Max) Current Mode PWM Control Circuit with 8.4V UVLO Threshold and 48&#37; Max Duty Cycle; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Rail; Qty per Container: 98
TMS320V642AZNZ5 Video/Imaging Fixed-Point Digital Signal Processor
TMS320V642AZNZ6 1A, 52kHz (250kHz Max) Current Mode PWM Control Circuit with 8.4V UVLO Threshold and 48&#37; Max Duty Cycle; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Tape and Reel; Qty per Container: 2500
相關代理商/技術參數
參數描述
TMS320V642AZDK5 制造商:Texas Instruments 功能描述:TMS320DM642A 548PIN FCBGA 500MHZ PG2.0 - Trays
TMS320V642AZDK6 制造商:Texas Instruments 功能描述:TMS320DM642A 548PIN FCBGA 600MHZ PG2.0 - Trays
TMS320V642AZDK7 制造商:Texas Instruments 功能描述:TMS320DM642A 548PIN FCBGA 720MHZ PG2.0 - Trays
TMS320V642AZNZ5 制造商:Texas Instruments 功能描述:TMS320DM642A PG2 548PIN FCBGA 500 MHZ - Trays
TMS320V642AZNZ6 制造商:Texas Instruments 功能描述:TMS320DM642A PG2 548PIN FCBGA 600MHZ - Trays
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