- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359304 > TMS320M642AZDK5 (Texas Instruments, Inc.) 1A, 52kHz (250khz Max) Current Mode PWM Control Circuit with 16V UVLO Threshold and 48% Max Duty Cycle<sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup> ; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Rail; Qty per Container: 98 PDF資料下載
參數(shù)資料
| 型號： | TMS320M642AZDK5 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 1A, 52kHz (250khz Max) Current Mode PWM Control Circuit with 16V UVLO Threshold and 48% Max Duty Cycle<sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup> ; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Rail; Qty per Container: 98 |
| 中文描述： | 視頻/影像定點數(shù)字信號處理器 |
| 文件頁數(shù)： | 77/123頁 |
| 文件大?。?/td> | 1205K |
| 代理商： | TMS320M642AZDK5 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁當前第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁
www.ti.com
GPyCTRL Reg
SYNC
SYSCLKOUT
Qualification
Input Signal
Qualified By 3
or 6 Samples
GPIOx
Time between samples
GPxQSEL
Number of Samples
TMS320F2808, TMS320F2806
TMS320F2801, UCD9501
Digital Signal Processors
SPRS230F–OCTOBER 2003–REVISED SEPTEMBER 2005
The user can select the type of input qualification for each GPIO pin via the GPxQSEL1/2 registers from
four choices:
Synchronization To SYSCLKOUT Only (GPxQSEL1/2=0,0): This is the default mode of all GPIO pins
at reset and it simply synchronizes the input signal to the system clock (SYSCLKOUT).
Qualification Using Sampling Window (GPxQSEL1/2=0,1 and 1,0): In this mode the input signal, after
synchronization to the system clock (SYSCLKOUT), is qualified by a specified number of cycles before
the input is allowed to change.
Figure 4-17. Qualification Using Sampling Window
The sampling period is specified by the QUALPRD bits in the GPxCTRL register and is configurable in
groups of 8 signals. It specifies a multiple of SYSCLKOUT cycles for sampling the input signal. The
sampling window is either 3-samples or 6-samples wide and the output is only changed when ALL
samples are the same (all 0s or all 1s) as shown in Figure 4-18 (for 6 sample mode).
No Synchronization (GPxQSEL1/2=1,1): This mode is used for peripherals where synchronization is
not required (synchronization is performed within the peripheral).
Due to the multi-level multiplexing that is required on the 280x device, there may be cases where a
peripheral input signal can be mapped to more then one GPIO pin. Also, when an input signal is not
selected, the input signal will default to either a 0 or 1 state, depending on the peripheral.
Peripherals
77
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMS320VC5409GGU | FIXED-POINT DIGITAL SIGNAL PROCESSOR |
| TOM9321 | VCO, 400 MHz - 500 MHz |
| TORX194 | FIBER OPTIC RECEIVER, 10Mbps, THROUGH HOLE MOUNT |
| TOTX177L(F,T) | FIBER OPTIC TRANSMITTER, 15Mbps, THROUGH HOLE MOUNT |
| TOTX179PL | FIBER OPTIC TRANSMITTER, 12.8Mbps, THROUGH HOLE MOUNT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMS320M642AZDK6 | 制造商:Texas Instruments 功能描述:DSP FIX PT 32BIT 600MHZ 4800MIPS 548FCBGA - Trays |
| TMS320M642AZNZ5 | 制造商:Texas Instruments 功能描述:DSP FIX PT 32BIT 500MHZ 4000MIPS 548FCBGA - Trays |
| TMS320M642AZNZ6 | 制造商:Texas Instruments 功能描述:DSP FIX PT 32BIT 600MHZ 4800MIPS 548FCBGA - Trays |
| TMS320M642AZNZ7 | 制造商:Texas Instruments 功能描述:DSP FIX PT 32BIT 720MHZ 5760MIPS 548FCBGA - Trays |
| TMS320M643AGDK5 | 制造商:Texas Instruments 功能描述:DSP FIX PT 32BIT 500MHZ 4000MIPS 548FCBGA - Trays |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。