參數(shù)資料
型號： TMS320LC2402APAGA
英文描述： DSP|16-BIT|CMOS|TQFP|64PIN|PLASTIC
中文描述： 數(shù)字信號處理器| 16位|的CMOS | TQFP封裝| 64管腳|塑料
文件頁數(shù)： 47/132頁
文件大?。?/td> 1707K
代理商： TMS320LC2402APAGA
SPRS145G
–
JULY 2000
–
REVISED FEBRUARY 2002
47
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
–
1443
PERIPHERALS
The integrated peripherals of the TMS320x240xA are described in the following subsections:
Two event-manager modules (EVA, EVB)
Enhanced analog-to-digital converter (ADC) module
Controller area network (CAN) module
Serial communications interface (SCI) module
Serial peripheral interface (SPI) module
PLL-based clock module
Digital I/O and shared pin functions
External memory interfaces (LF2407A only)
Watchdog (WD) timer module
event manager modules (EVA, EVB)
The event-manager modules include general-purpose (GP) timers, full-compare/PWM units, capture units, and
quadrature-encoder pulse (QEP) circuits. EVA
’
s and EVB
’
s timers, compare units, and capture units function
identically. However, timer/unit names differ for EVA and EVB. Table 7 shows the module and signal names
used. Table 7 shows the features and functionality available for the event-manager modules and highlights EVA
nomenclature.
Event managers A and B have identical peripheral register sets with EVA starting at 7400h and EVB starting
at 7500h. The paragraphs in this section describe the function of GP timers, compare units, capture units, and
QEPs using EVA nomenclature. These paragraphs are applicable to EVB with regard to function
—
however,
module/signal names would differ.
Table 7. Module and Signal Names for EVA and EVB
EVENT MANAGER MODULES
EVA
EVB
MODULE
SIGNAL
MODULE
SIGNAL
GP Timers
Timer 1
Timer 2
T1PWM/T1CMP
T2PWM/T2CMP
Timer 3
Timer 4
T3PWM/T3CMP
T4PWM/T4CMP
Compare Units
Compare 1
Compare 2
Compare 3
PWM1/2
PWM3/4
PWM5/6
Compare 4
Compare 5
Compare 6
PWM7/8
PWM9/10
PWM11/12
Capture Units
Capture 1
Capture 2
Capture 3
CAP1
CAP2
CAP3
Capture 4
Capture 5
Capture 6
CAP4
CAP5
CAP6
QEP
QEP1
QEP2
QEP1
QEP2
QEP3
QEP4
QEP3
QEP4
External Inputs
Direction
External Clock
TDIRA
TCLKINA
Direction
External Clock
TDIRB
TCLKINB
相關(guān)PDF資料
PDF描述
TMS320LC2402APAGS DSP|16-BIT|CMOS|TQFP|64PIN|PLASTIC
TMS320LC2402APGA DSP|16-BIT|CMOS|QFP|64PIN|PLASTIC
TMS320LC2402APGS DSP|16-BIT|CMOS|QFP|64PIN|PLASTIC
TMS320LC2404APZA DSP|16-BIT|CMOS|QFP|100PIN|PLASTIC
TMS320LC2404APZS DSP|16-BIT|CMOS|QFP|100PIN|PLASTIC
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