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參數(shù)資料
| 型號： | TMS320FAMILY |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 16-Bit Digital Signal Processor |
| 中文描述： | 16位數(shù)字信號處理器 |
| 文件頁數(shù)： | 32/132頁 |
| 文件大小： | 1707K |
| 代理商： | TMS320FAMILY |
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SPRS145G
–
JULY 2000
–
REVISED FEBRUARY 2002
32
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
–
1443
device reset and interrupts
The TMS320x240xA software-programmable interrupt structure supports flexible on-chip and external interrupt
configurations to meet real-time interrupt-driven application requirements. The LF240xA recognizes three types
of interrupt sources.
Reset
(hardware- or software-initiated) is unarbitrated by the CPU and takes immediate priority over any
other executing functions. All maskable interrupts are disabled until the reset service routine enables them.
The LF240xA devices have two sources of reset: an external reset pin and a watchdog timer time-out
(reset).
Hardware-generated interrupts
are requested by external pins or by on-chip peripherals. There are two
types:
–
External interrupts
are generated by one of four external pins corresponding to the interrupts XINT1,
XINT2, PDPINTA, and PDPINTB. These four can be masked both by dedicated enable bits and by the
CPU
’
s interrupt mask register (IMR), which can mask each maskable interrupt line at the DSP core.
–
Peripheral interrupts
are initiated internally by these on-chip peripheral modules: event manager A,
event manager B, SPI, SCI, CAN, and ADC. They can be masked both by enable bits for each event in
each peripheral and by the CPU
’
s IMR, which can mask each maskable interrupt line at the DSP core.
Software-generated interrupts
for the LF240xA devices include:
–
The INTR instruction.
This instruction allows initialization of any LF240xA interrupt with software. Its
operand indicates the interrupt vector location to which the CPU branches. This instruction globally
disables maskable interrupts (sets the INTM bit to 1).
–
The NMI instruction.
This instruction forces a branch to interrupt vector location 24h. This instruction
globally disables maskable interrupts. 240xA devices do not have the NMI hardware signal, only
software activation is provided.
–
The TRAP instruction.
This instruction forces the CPU to branch to interrupt vector location 22h. The
TRAP instruction does
not
disable maskable interrupts (INTM is not set to 1); therefore, when the CPU
branches to the interrupt service routine, that routine can be interrupted by the maskable hardware
interrupts.
–
An emulator trap.
This interrupt can be generated with either an INTR instruction or a TRAP instruction.
Six core interrupts (INT1
–
INT6) are expanded using a peripheral interrupt expansion (PIE) module identical to
the F24x devices. The PIE manages all the peripheral interrupts from the 240xA peripherals and are grouped to
share the six core level interrupts. Figure 8 shows the PIE block diagram for hardware-generated interrupts.
The PIE block diagram (Figure 8) and the interrupt table (Table 3) explain the grouping and interrupt vector
maps. LF240xA devices have interrupts identical to those of the F24x devices and should be completely
code-compatible. 240xA devices also have peripheral interrupts identical to those of the F24x
–
plus additional
interrupts for new peripherals such as event manager B. Though the new interrupts share the 24x interrupt
grouping, they all have a unique vector to differentiate among the interrupts. See Table 3 for details.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TMS320G203PZ | 制造商:n/a 功能描述:320G203 S7G4A |
| TMS320-JTAG | 功能描述:仿真器/模擬器 DSP JTAG FOR PROG & EMULATION RoHS:否 制造商:Blackhawk 產品:System Trace Emulators 工具用于評估:C6000, C5000, C2000, OMAP, DAVINCI, SITARA, TMS470, TMS570, ARM 7/9, ARM Cortex A8/R4/M3 用于:XDS560v2 |
| TMS320-JTAG-USB | 功能描述:JTAG調試器 DSP USB JTAG FOR XDS100 SOFTWARE RoHS:否 制造商:Olimex Ltd. 產品:JTAG In-Circuit Debuggers 工具用于評估:MSP430 Flash MCUs 用于:MSP430 Kick Start, MSPGCC 核心:MSP430 接口類型:JTAG, USB 工作電源電壓:12 V |
| TMS320LBC51PQA57 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC DSP RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| TMS320LBC51PZ | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
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