參數(shù)資料
型號: TMS320F28069PZPQ
廠商: Texas Instruments
文件頁數(shù): 126/174頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 256KB FLSH 100HTQFP
產(chǎn)品培訓模塊: ControlSUITE
Piccolo F2806x
TPS75005 Single IC Power for C2000 MCU
標準包裝: 1,000
系列: TMS320F2806x, Piccolo™, C2000™
核心處理器: C28x
芯體尺寸: 32-位
速度: 80MHz
連通性: CAN,I²C,McBSP,SCI,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 54
程序存儲器容量: 256KB(128K x 16)
程序存儲器類型: 閃存
RAM 容量: 50K x 16
電壓 - 電源 (Vcc/Vdd): 1.71 V ~ 1.995 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 100-TQFP 裸露焊盤
包裝: 托盤
SPRS698D – NOVEMBER 2010 – REVISED DECEMBER 2012
2.10 Low-power Modes Block
Table 2-18 summarizes the various modes.
Table 2-18. Low-power Modes
MODE
LPMCR0(1:0)
OSCCLK
CLKIN
SYSCLKOUT
EXIT(1)
XRS, CPU-watchdog interrupt, any
IDLE
00
On
enabled interrupt
On
XRS, CPU-watchdog interrupt, GPIO
STANDBY
01
Off
(CPU-watchdog still running)
Port A signal, debugger(2)
Off
(on-chip crystal oscillator and
XRS, GPIO Port A signal, debugger(2),
HALT(3)
1X
PLL turned off, zero-pin oscillator
Off
CPU-watchdog
and CPU-watchdog state
dependent on user code.)
(1)
The Exit column lists which signals or under what conditions the low power mode is exited. A low signal, on any of the signals, exits the
low power condition. This signal must be kept low long enough for an interrupt to be recognized by the device. Otherwise, the low-power
mode will not be exited and the device will go back into the indicated low power mode.
(2)
The JTAG port can still function even if the CPU clock (CLKIN) is turned off.
(3)
The WDCLK must be active for the device to go into HALT mode.
The various low-power modes operate as follows:
IDLE Mode:
This mode is exited by any enabled interrupt that is recognized by the
processor. The LPM block performs no tasks during this mode as long as
the LPMCR0(LPM) bits are set to 0,0.
STANDBY Mode:
Any GPIO port A signal (GPIO[31:0]) can wake the device from STANDBY
mode. The user must select which signals will wake the device in the
GPIOLPMSEL register. The selected signals are also qualified by the
OSCCLK before waking the device. The number of OSCCLKs is specified in
the LPMCR0 register.
HALT Mode:
CPU-watchdog, XRS, and any GPIO port A signal (GPIO[31:0]) can wake
the device from HALT mode. The user selects the signal in the
GPIOLPMSEL register.
NOTE
The low-power modes do not affect the state of the output pins (PWM pins included). They
will be in whatever state the code left them in when the IDLE instruction was executed. See
the "Systems Control and Interrupts" chapter of the TMS320x2806x Piccolo Technical
Reference Manual (literature number SPRUH18) for more details.
Copyright 2010–2012, Texas Instruments Incorporated
Device Overview
55
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