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參數(shù)資料
| 型號： | TMS320E17 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 200mA, 40kHz PWM Control Circuit with 6.4V UVLO Threshold and 48% Max Duty Cycle; Package: SOIC 16 LEAD; No of Pins: 16; Container: Tape and Reel; Qty per Container: 2500 |
| 中文描述： | 數(shù)字信號處理器 |
| 文件頁數(shù)： | 46/123頁 |
| 文件大?。?/td> | 1205K |
| 代理商： | TMS320E17 |
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4
Peripherals
4.1
32-Bit CPU-Timers 0/1/2
Borrow
Reset
Timer Reload
SYSCLKOUT
TCR.4
(Timer Start Status)
TINT
16-Bit Timer Divide-Down
TDDRH:TDDR
32-Bit Timer Period
PRDH:PRD
32-Bit Counter
TIMH:TIM
16-Bit Prescale Counter
PSCH:PSC
Borrow
TMS320F2808, TMS320F2806
TMS320F2801, UCD9501
Digital Signal Processors
SPRS230F–OCTOBER 2003–REVISED SEPTEMBER 2005
The integrated peripherals of the 280x are described in the following subsections:
Three 32-bit CPU-Timers
Up to six enhanced PWM modules (ePWM1, ePWM2, ePWM3, ePWM4, ePWM5, ePWM6)
Up to four enhanced capture modules (eCAP1, eCAP2, eCAP3, eCAP4)
Up to two enhanced QEP modules (eQEP1, eQEP2)
Enhanced analog-to-digital converter (ADC) module
Up to two enhanced controller area network (eCAN) modules (eCAN-A, eCAN-B)
Up to two serial communications interface modules (SCI-A, SCI-B)
Up to four serial peripheral interface (SPI) modules (SPI-A, SPI-B, SPI-C, SPI-D)
Inter-integrated circuit module (I
2
C)
Digital I/O and shared pin functions
There are three 32-bit CPU-timers on the 280x devices (CPU-TIMER0/1/2).
CPU-Timer 1 is reserved for TI system functions and Timer 2 is reserved for DSP/BIOS. CPU-Timer 0
can be used in user applications. These timers are different from the timers that are present in the ePWM
modules.
NOTE
NOTE: If the application is not using DSP/BIOS, then CPU-Timer 2 can be used in the
application.
Figure 4-1. CPU-Timers
In the 280x devices, the timer interrupt signals (TINT0, TINT1, TINT2) are connected as shown in
Figure 4-2
.
46
Peripherals
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