參數(shù)資料
型號： TMS320E17
廠商： Texas Instruments, Inc.
英文描述： 200mA, 40kHz PWM Control Circuit with 6.4V UVLO Threshold and 48% Max Duty Cycle; Package: SOIC 16 LEAD; No of Pins: 16; Container: Tape and Reel; Qty per Container: 2500
中文描述： 數(shù)字信號處理器
文件頁數(shù)： 22/123頁
文件大小： 1205K
代理商： TMS320E17
www.ti.com
3
Functional Overview
INT[12:1]
Real-Time JTAG
(TDI, TDO, TRST, TCK,
TMS, EMU0, EMU1)
C28x CPU
(100 MHz)
NMI, INT13
Memory Bus
Boot ROM
4 K
16
(1-wait state)
FLASH
64 K
x 16
(F2808)
32K x 16 (F2806)
16K x 16 (F2801)
16K x 16 (9501)
H0 SARAM
(C)
8 K 16
(0-wait)
L1 SARAM
(B)
4 K 16
(0-wait)
L0 SARAM
4 K 16
(0-wait)
M0 SARAM
1 K 16
M1 SARAM
1 K 16
INT14
32-bit CPU TIMER 0
32-bit CPU TIMER 1
32-bit CPU TIMER 2
SYSCLKOUT
RS
CLKIN
12-Bit ADC
ADCSOCA/B
SOCA/B
16 Channels
12
6
32
XCLKOUT
XRS
XCLKIN
X1
X2
32
4
System Control
(Oscillator, PLL,
Peripheral Clocking,
Low Power Modes,
WatchDog)
ePWM1/2/3/4/5/6
(12 PWM outputs,
6 trip zones,
6 timers 16-bit)
eCAP1/2/3/4
(4 timers 32-bit)
eQEP1/2
eCAN-A/B (32 mbox)
External Interrupt
Control
PIE
(96 Interrupts)
(A)
FIFO
FIFO
FIFO
SCI-A/B
SPI-A/B/C/D
I2C-A
4
8
4
2
16
G
GPIOs
(35)
TINT0
TINT1
TINT2
7
OTP
1K 16
Peripheral Bus
Protected by the code-security module.
TMS320F2808, TMS320F2806
TMS320F2801, UCD9501
Digital Signal Processors
SPRS230F–OCTOBER 2003–REVISED SEPTEMBER 2005
A.
B.
C.
43 of the possible 96 interrupts are used on the devices.
Not available in F2801/9501
Not available in F2806 or F2801/9501
Figure 3-1. Functional Block Diagram
22
Functional Overview
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