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參數(shù)資料
| 型號： | TMS320C6701MULTICHANNELBUFFERED |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 32-Bit Digital Signal Processor |
| 中文描述： | 32位數(shù)字信號處理器 |
| 文件頁數(shù)： | 57/132頁 |
| 文件大?。?/td> | 1707K |
| 代理商： | TMS320C6701MULTICHANNELBUFFERED |
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SPRS145G
–
JULY 2000
–
REVISED FEBRUARY 2002
57
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
–
1443
serial peripheral interface (SPI) module
Some 240xA devices include the four-pin serial peripheral interface (SPI) module. The SPI is a high-speed,
synchronous serial I/O port that allows a serial bit stream of programmed length (one to sixteen bits) to be shifted
into and out of the device at a programmable bit-transfer rate. Normally, the SPI is used for communications
between the DSP controller and external peripherals or another processor. Typical applications include external
I/O or peripheral expansion through devices such as shift registers, display drivers, and ADCs. Multidevice
communications are supported by the master/slave operation of the SPI.
The SPI module features include:
Four external pins:
–
SPISOMI: SPI slave-output/master-input pin
–
SPISIMO: SPI slave-input/master-output pin
–
SPISTE: SPI slave transmit-enable pin
–
SPICLK: SPI serial-clock pin
NOTE: All four pins can be used as GPIO, if the SPI module is not used.
Two operational modes: master and slave
Baud rate: 125 different programmable rates/10 Mbps at 40-MHz CPUCLK
Data word length: one to sixteen data bits
Four clocking schemes (controlled by clock polarity and clock phase bits) include:
–
Falling edge without phase delay: SPICLK active high. SPI transmits data on the falling edge of the
SPICLK signal and receives data on the rising edge of the SPICLK signal.
–
Falling edge with phase delay: SPICLK active high. SPI transmits data one half-cycle ahead of the
falling edge of the SPICLK signal and receives data on the falling edge of the SPICLK signal.
–
Rising edge without phase delay: SPICLK inactive low. SPI transmits data on the rising edge of the
SPICLK signal and receives data on the falling edge of the SPICLK signal.
–
Rising edge with phase delay: SPICLK inactive low. SPI transmits data one half-cycle ahead of the
falling edge of the SPICLK signal and receives data on the rising edge of the SPICLK signal.
Simultaneous receive and transmit operation (transmit function can be disabled in software)
Transmitter and receiver operations are accomplished through either interrupt-driven or polled algorithms.
Nine SPI module control registers: Located in control register frame beginning at address 7040h.
NOTE: All registers in this module are 16-bit registers that are connected to the 16-bit peripheral bus. When a register is accessed, the
register data is in the lower byte (7
–
0), and the upper byte (15
–
8) is read as zeros. Writing to the upper byte has no effect.
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| TMS320C6711-100 | Floating-Point Digital Signal Processor |
| TMS320C6711-150 | Floating-Point Digital Signal Processor |
| TMS320C6711B-100 | Floating-Point Digital Signal Processor |
| TMS320C6711B-150 | Floating-Point Digital Signal Processor |
| TMS320C6711BGFNA100 | DSP|32-BIT|CMOS|BGA|256PIN|PLASTIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMS320C6711BFGNA100 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| TMS320C6711BGFN100 | 功能描述:IC FLOATING-POINT DSP 256-BGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:TMS320C67x 標準包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| TMS320C6711BGFN-100 | 制造商:Texas Instruments 功能描述: |
| TMS320C6711BGFN150 | 功能描述:IC FLOATING-POINT DSP 256-BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:TMS320C67x 標準包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| TMS320C6711BGFNA-100 | 制造商: 功能描述: 制造商:undefined 功能描述: |
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