參數(shù)資料
型號: TMS320C40-50
元件分類: 數(shù)字信號處理
英文描述: Digital Signal Processors
中文描述: 數(shù)字信號處理器
文件頁數(shù): 75/132頁
文件大?。?/td> 1707K
代理商: TMS320C40-50
SPRS145G
JULY 2000
REVISED FEBRUARY 2002
75
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
electrical characteristics over recommended operating free-air temperature ranges (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VDD = 3.0 V, IOH = IOHMAX
All outputs at 50
μ
A
MIN
2.4
TYP
MAX
VDDO
UNIT
VOH
High level output voltage
High-level output voltage
V
VDDO
0.2
VOL
Low-level output voltage
IOL = IOLMAX
0.4
V
IIL
Inp t c rrent (lo
Input current (low level)
le el)
With pullup
VDD = 3.3 V, VIN = 0 V
3 3 V V
9
16
25
±
2
±
2
25
±
2
With pulldown
μ
A
IIH
Input current (high level)
With pullup
VDD = 3.3 V, VIN = VDD
3 3 V V
With pulldown
9
16
μ
A
IOZ
Ci
Co
Output current, high-impedance state (off-state)
VO = VDD or 0 V
μ
A
pF
Input capacitance
2
Output capacitance
3
pF
current consumption by power-supply pins over recommended operating free-air temperature
ranges at 40-MHz CLOCKOUT
PARAMETER
TEST CONDITIONS
DEVICE
MIN
TYP
MAX
UNIT
A test code running in B0 RAM does the
following:
1. Enables clock to all peripherals.
2. Toggles all PWM outputs at 20 kHz.
P f
3. Performs a continuous conversion of all
ADC channels.
4. An infinite loop which transmits a character
t f SCI
out of SCI and executes MACD instructions.
LF2407A
95
120
mA
LF2406A
95
120
mA
f ll
LF2403A
95
120
mA
IDD
Operational Current
LF2402A
85
110
mA
LC2406A
85
110
mA
LC2404A
85
110
mA
NOTE: All I/O pins are floating.
LC2402A
75
95
mA
LF2407A
10
15
mA
LF2406A
10
15
mA
LF2403A
10
15
mA
ICCA
ADC module current
LF2402A
10
15
mA
LC2406A
10
15
mA
LC2404A
10
15
mA
LC2402A
10
15
mA
IDD is the current flowing into the VDD, VDDO, and PLLVCCA pins.
current consumption by power-supply pins over recommended operating free-air temperature
ranges during low-power modes at 40-MHz CLOCKOUT (TMS320LF2407A)
PARAMETER
MODE
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IDD
Operational Current
LPM0
Clock to all peripherals is enabled.
Clock to all eri herals is enabled.
No I/O pins are switching.
70
80
mA
ICCA
IDD
ADC module current
10
15
mA
Operational Current
LPM1
Clock to all peripherals is disabled.
Clock to all eri herals is disabled.
No I/O pins are switching.
35
45
mA
ICCA
IDD
ADC module current
0
0
mA
Operational Current
LPM2
Clock to all peripherals is disabled.
Flash is powered down.
Input clock is disabled.
200
400
μ
A
ICCA
IDD is the current flowing into the VDD, VDDO, and PLLVCCA pins.
If a quartz crystal or ceramic resonator is used as the clock source, the LPM2 mode shuts down the internal oscillator.
ADC module current
0
0
mA
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