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參數資料
| 型號： | TMS27C256-150 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Programmable Read-Only Memory(32K×8結構,可擦可編程只讀存儲器) |
| 中文描述： | 可編程只讀存儲器（32K的× 8結構，可擦可編程只讀存儲器） |
| 文件頁數： | 4/13頁 |
| 文件大?。?/td> | 280K |
| 代理商： | TMS27C256-150 |
TMS27C256 262144-BIT UV ERASABLE PROGRAMMABLE
TMS27PC256 262144-BIT PROGRAMMABLE
READ-ONLY MEMORY
SMLS256G – SEPTEMBER 1984 – REVISED JUNE 1995
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
initializing (TMS27PC256)
The one-time programmable TMS27PC256 PROM is provided with all bits in the logic high state, then logic lows
are programmed into the desired locations. Logic lows programmed into an OTP PROM cannot be erased.
SNAP! Pulse programming
The 256K EPROM and OTP PROM are programmed using the TI SNAP! Pulse programming algorithm
illustrated by the flowchart in Figure 1, which programs in a nominal time of four seconds. Actual programming
time varies as a function of the programmer used.
Data is presented in parallel (eight bits) on pins DQ0 to DQ7. Once addresses and data are stable, E is pulsed.
The SNAP! Pulse programming algorithm uses initial pulses of 100 microseconds (
μ
s) followed by a byte
verification to determine when the addressed byte has been successfully programmed. Up to 10 (ten) 100-
μ
s
pulses per byte are provided before a failure is recognized.
The programming mode is achieved when V
PP
= 13 V, V
CC
= 6.5 V, G = V
IH
, and E = V
IL
. More than one device
can be programmed when the devices are connected in parallel. Locations can be programmed in any order.
When the SNAP! Pulse programming routine is complete, all bits are verified with V
CC
= V
PP
= 5 V.
program inhibit
Programming can be inhibited by maintaining a high level input on the E pin.
program verify
Programmed bits can be verified with V
PP
= 13 V when G = V
IL
and E = V
IH
.
signature mode
The signature mode provides access to a binary code identifying the manufacturer and type. This mode is
activated when A9 is forced to 12 V
±
0.5 V. Two identifier bytes are accessed by A0; i.e., A0 = V
IL
accesses
the manufacturer code, which is output on DQ0–DQ7; A0 = V
IH
accesses the device code, which is output on
DQ0–DQ7. All other addresses must be held at V
IL
. The manufacturer code for these devices is 97, and the
device code is 04.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| TMS27C256-150JL | 制造商:Texas Instruments 功能描述: 制造商:Texas Instruments 功能描述:EPROM, 32K x 8, 28 Pin, Ceramic, DIP |
| TMS27C256-15JE4 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EPROM |
| TMS27C25615JL | 制造商:TI 功能描述:New 制造商:Texas Instruments 功能描述: |
| TMS27C256-15JL | 制造商:Texas Instruments 功能描述:EPROM, 32K x 8, 28 Pin, Ceramic, DIP |
| TMS27C256-15JL4 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EPROM |
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