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參數(shù)資料
| 型號： | TMP141AIDBVTG4 |
| 廠商： | Texas Instruments |
| 文件頁數(shù)： | 9/24頁 |
| 文件大?。?/td> | 662K |
| 描述： | IC TEMP SENSOR DGTL OUT SOT23-6 |
| 標準包裝： | 250 |
| 系列： | SensorPath™ |
| 功能： | 溫度監(jiān)控系統(tǒng)（傳感器） |
| 傳感器類型： | 內(nèi)部 |
| 感應溫度： | -40°C ~ 125°C |
| 精確度： | ±3°C（最小值） |
| 拓撲： | ADC（三角積分型），寄存器庫 |
| 輸出類型： | 1 線 SensorPath? |
| 輸出警報： | 無 |
| 輸出風扇： | 無 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-6 |
| 供應商設備封裝： | SOT-23-6 |
| 包裝： | 帶卷 (TR) |
TMP141
SBAS347A MARCH 2005 REVISED JULY 2006
www.ti.com
9
Read and Write Transactions
A complete Read transmission consists of a Start Bit, the device number, the Register Number, R/W
= 1, the data bits, an
even parity bit, and an Acknowledge bit. The most significant bit is sent first.
Read Transaction
START
DEVICE NUMBER
REGISTER NUMBER
R/W
8 or 16 DATA BITS
EP
ACK
M
M
M
M
M
M
M
M
M
M
M
S & S
S
M
A complete Write transmission consists of a Start Bit, the device number, the Register Number, R/W
= 0, the data bits, an
even parity bit, and an Acknowledge bit.
Write Transaction
START
DEVICE NUMBER
REGISTER NUMBER
R/W
8 or 16 DATA BITS
EP
ACK
M
M
M
M
M
M
M
M
M
M
M
M & M
M
S
M indicates that the bit is initiated and controlled by the master. S indicates that the bit is initiated by the master but controlled
by the slave; if the data is a 1, the slave lengthens the time that the bus is held low to signal a 1.
The device number is three bits long. Device number 0 is reserved for a broadcast to all devices, leaving address space
for seven slaves.
The Register Number is six bits long.
The R/W
is a 1 for a read operation. The R/W
bit is a 0 for a write operation.
All data bits are started by the master pulling the bus low. The TMP141 will detect the bus being low within time t
SFEdet
.
If it is a read transaction and the TMP141 needs to send a 1 for that bit period, it will hold the bus low for time t
SLout1
.
In a Write operation, the data bits and parity are sent by the master. In a Read operation, the data bits and parity are sent
by the TMP141. Data length is eight bits for registers 0, 4, and 20h. All other registers are 16 bits long. The number of bits
transmitted or received depends on the length of the register: 8 bits for an 8-bit register and 16 bits for a 16-bit register.
Even parity (EP) is used on the SensorPath. The parity calculation includes all bits after the Start Bit, up to and including
the parity bit. Thus, the parity calculation includes the device number, the Register Number, R/W
, the data bits, and the
parity bit. In a Write operation, the TMP141 checks the parity sent by the master before generating the Acknowledge bit.
The Acknowledge bit is sent by the receiving unit. In a Write operation, the Acknowledge bit will come from the TMP141.
In a Read operation, the master generates the Acknowledge bit.
ACKNOWLEDGE Bit Definition:
1: A complete data transmission was completed without a parity error.
0: An error was detected. (BER in the Status Register will be set. An Attention Request will be generated.)
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