參數(shù)資料
型號(hào)： TLV990-13PFBG4
廠商： TEXAS INSTRUMENTS INC
元件分類(lèi)： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝： GREEN, TQFP-48
文件頁(yè)數(shù)： 16/22頁(yè)
文件大?。?/td> 292K
代理商： TLV990-13PFBG4
TLV990-13
3-V, 10-BIT, 13-MSPS AREA CCD ANALOG FRONT END
SLAS282 – JULY 2000
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
NO.
ADCCLK
25
I
ADC clock input
AGND1
44
Analog ground for internal CDS circuits
AGND2
4
Analog ground for internal PGA circuits
AGND3
20
Analog ground for internal DAC circuits
AGND4
32
Analog ground for internal ADC circuits
AGND5
37
Analog ground for internal REF circuits
AVDD1
43
Analog supply voltage for internal CDS circuits, 3 V
AVDD2
3
Analog supply voltage for internal PGA circuits, 3 V
AVDD3
19
Analog supply voltage for internal DAC circuits, 3 V
AVDD4
33
Analog supply voltage for internal ADC circuits, 3 V
AVDD5
41
Analog supply voltage for internal ADC circuits, 3 V
BLKG
36
I
Control input. The CDS operation is disabled when BLKG is pulled low.
CLCCD
47
I
CCD signal clamp control input
CCDIN
1
I
CCD input
CLREF
48
O
Clamp-reference-voltage output
CP
34, 35
I
Connect these pins to AVDD
CS
28
I
Chip select. A logic low on this input enables the serial port.
D0 – D9
7–16
O
10-bit 3-state ADC output data or offset DACs test data
DACO1
21
O
Digital-to-analog converter output1
DACO2
22
O
Digital-to-analog converter output2
DGND
5
Digital ground
DIGND
18
Digital-interface-circuit ground
DIVDD
17
Digital-interface-circuit supply voltage, 1.8 V– 4.4 V
DVDD
6
Digital-supply voltage, 3 V
NC
2
I
No connect
OBCLP
31
I
Optical black-level and offset-calibration control input, active low
OE
24
I
Output-data enable, active low
RBD
38
O
Internal bandgap reference for external decoupling
RESET
29
I
Hardware-reset input, active low. This signal forces a reset of all internal registers.
RMD
39
O
Ref– output for external decoupling
RPD
40
O
Ref+ output for external decoupling
SDIN
27
I
Serial-data input to configure the internal registers
SCKP
23
I
This pin selects the polarity of SCLK. 0 – active low (high when SCLK is not running), 1 – active high (low
when SCLK is not running).
SCLK
26
I
Serial-clock input. This clock synchronizes the serial data transfer.
SR
45
I
CCD reference-level-sample clock input
STBY
30
I
Hardware power-down control input, active low
SV
46
I
CCD signal-level sample clock input
VSS
42
Silicon substrate, normally connected to analog ground
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TLV990-21 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:3-V,10-BIT,21-MSPS AREA CCD ANALOG FRONT END
TLV990-21PFB 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 3-V 10-Bit 21-MSPS Area CCD RoHS:否 制造商:Texas Instruments 輸入信號(hào)類(lèi)型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類(lèi)型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel
TLV990-21PFBG4 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 3-V 10-Bit 21-MSPS Area CCD RoHS:否 制造商:Texas Instruments 輸入信號(hào)類(lèi)型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類(lèi)型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel
TLV990-28 制造商:Texas Instruments 功能描述:CCD Analogue Front End 28MSPS TLV990-28
TLV99028PFB 制造商:Texas Instruments 功能描述:
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