參數(shù)資料
型號： TLV320DAC26IRHBR
英文描述： LOW POWER STEREO AUDIO DAC WITH HEADPHONE/SPEAKER AMPLIFIER
中文描述： 低功耗立體聲音頻DAC耳機/揚聲器放大器
文件頁數(shù)： 37/46頁
文件大?。?/td> 452K
代理商： TLV320DAC26IRHBR
SLAS428 AUGUST 2004
www.ti.com
37
REGISTER 1DH: Audio Control 4
BIT
NAME
READ/
WRITE
RESET
VALUE
FUNCTION
D15
R/W
0
Reserved
D14
DASTPD
R/W
0
DAC PGA Soft-Stepping Control
0 => Soft-stepping enabled
1 => Soft-stepping disabled
D13
ASSTPD
R/W
0
Analog Sidetone Soft-Stepping Control
0 => Soft-stepping enabled
1 => Soft-stepping disabled
D12D9
Reserved
R/W
0
Reserved
Note: Only write a 0 to this bit
D8
SHCKT_DIS
R/W
0
Disable Short Circuit Detection
0 => Short circuit detection enabled
1 => Short circuit detection disabled
D7
SHCKT_PD
R/W
0
Power Down Drivers if Short Circuit Detected
0 => No auto power down of drivers on short circuit.
1 => Auto power down drivers on short circuit.
D6
SHCKT_FLAG
R
0
Short Circuit Detected Flag
0 => Short circuit not detected
1 => Short circuit detected
D5
DAC_POP_RED
R
0
DAC POP Reduction Enable
0 => Disable POP reduction
1 => Enable POP reduction
D4
DAC_POP_RED_
SET1
R/W
0
DAC POP Reduction Setting 1
0 => Fast setting
1 => Slow setting
D3D2
DAC_POP_RED_
SET2
R/W
00
DAC POP Reduction Setting 2
00 => Long setting
11 => Short setting
D1D0
Reserved
R
XX
Reserved
REGISTER 1EH: Audio Control 5
BIT
NAME
READ/
WRITE
RESET
VALUE
FUNCTION
D15D3
Reserved
R/W
0
Reserved
Note: Only write a 0 to this bit
D2
DRV_POP_DIS
R/W
0
Audio Output Driver POP Reduction Enable
0 => Enabled
1 => Disabled
D1
DRV_POP_LEN
R/W
0
Audio Output Driver POP Reduction Duration
0 => Output driver ramps to final voltage in approximately 0.8 sec, if VGND is
powered down (1 msec otherwise).
1 => Output driver ramps to final voltage in approximately 4 sec, if VGND is powered
down (1 msec otherwise).
D0
Reserved
R
0
Reserved. Always write a 0 to this bit.
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