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參數(shù)資料
| 型號： | TLV320AIC33IRGZ |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | Codec |
| 英文描述： | Low Power Stereo Audio Codec for Portable Audio/Telephony |
| 中文描述： | 低功耗立體聲音頻編解碼器的便攜式音頻/電話 |
| 文件頁數(shù)： | 24/46頁 |
| 文件大?。?/td> | 452K |
| 代理商： | TLV320AIC33IRGZ |
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SLAS428 AUGUST 2004
www.ti.com
24
SPI DIGITAL INTERFACE
All ’DAC26 control registers are programmed through a standard SPI bus. The SPI allows full-duplex, synchronous, serial
communication between a host processor (the master) and peripheral devices (slaves). The SPI master generates the
synchronizing clock and initiates transmissions. The SPI slave devices depend on a master to start and synchronize
transmissions.
A transmission begins when initiated by a master SPI. The byte from the master SPI begins shifting in on the slave SPIDIN
(MOSI) pin under the control of the master serial clock. As the byte shifts in on the SPIDIN pin, a byte shifts out on the
SPIDOUT (MISO) pin to the master shift register.
The idle state of the serial clock for the ’DAC26 is low, which corresponds to a clock polarity setting of 0 (typical
microprocessor SPI control bit CPOL = 0). The ’DAC26 interface is designed so that with a clock phase bit setting of 1
(typical microprocessor SPI control bit CPHA = 1), the master begins driving its MOSI pin and the slave begins driving its
SPIDOUT pin on the first serial clock edge. The SS pin can remain low between transmissions; however, the ’DAC26 only
interprets command words which are transmitted after the falling edge of SS.
Hardware Reset
The device requires a low-to-high pulse on RESET after power up for correct operation. A hardware reset pulse initializes
all the internal registers, counters, and logic.
Hardware Power Down
By default the PWD pin is configured as a hardware power-down (active low) signal. The device powers down all the internal
circuitry to save power. All the register contents are maintained. Some counters maintain their value.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TLV320AIC33IRGZR | 功能描述:接口—CODEC Low-Pwr Stereo CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC33IRGZR | 制造商:Texas Instruments 功能描述:AUDIO CODEC IC ((NW)) 制造商:Texas Instruments 功能描述:IC, AUDIO CODEC, 24BIT, 96KHZ, QFN-48 |
| TLV320AIC33IRGZRG4 | 功能描述:接口—CODEC Lo-Pwr Stereo CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC33IRGZT | 功能描述:接口—CODEC Lo-Pwr Stereo CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC33IRGZT | 制造商:Texas Instruments 功能描述:IC STEREO AUDIO CODEC 48-VQFN |
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