
TLV320AIC26
SLAS412 DECEMBER 2003
www.ti.com
45
REGISTER 05H: CODEC Power Control
BIT
NAME
READ/
WRITE
RESET
VALUE
FUNCTION
D15
PWDNC
R/W
1
Codec Power-Down Control
0 => Codec powered up
1 => Codec powered down
D14
R
0
Reserved (During read the value of this bit is 0. Write only 0 into this location.)
D13
ASTPWD
R/W
1
Analog Sidetone Power-down Control
0 => Analog sidetone powered up
1 => Analog sidetone powered down
D12
DAODRC
R/W
0
Audio Output Driver Control
0 => Output driver in low power mode
1 => Output driver in high power mode
D11
ASTPWF
R
1
Analog Sidetone Power-Down Flag
0 => Analog sidetone powered down is not complete.
1 => Analog sidetone powered down is complete.
D10
DAPWDN
R/W
1
DAC Power-Down Control
0 => Power up the DAC
1 => Power down the DAC
D9
ADPWDN
R/W
1
ADC Power-Down Control
0 => Power up the ADC
1 => Power down the ADC
D8
VGPWDN
R/W
1
Driver Virtual Ground Power Down
0 => Power up the VGND amp
1 => Power down the VGND amp
D7
ADPWDF
R
1
ADC Power-Down Flag
0 => ADC power down is not complete.
1 => ADC power down is complete.
D6
DAPWDF
R
1
DAC Power-Down Flag (See DAC Power down section of this data sheet)
0 => DAC power down is not complete.
1 => DAC power down is complete.
D5
ADWSF
R/W
0
ADWS Pin Function
0 => ADWS pin acts as hardware power down.
1 => ADWS pin acts as ADC WordSelect.
Note: ADWS pin should be programmed as hardware power down only if the ADC channel is
powered down or both the ADC and DAC channels have the same sampling rate. If both the ADC
and DAC channels have the same sampling rates, then LRCK can act as a common word select
signal for the ADC and DAC.
D4
VBIAS
R/W
0
VBIAS Voltage
0 => VBIAS output = 2.5 V
1 => VBIAS output = 2.0 V
D3D2
R
00
Reserved. Write only 00 into this location.
D1
EFFCTL
R/W
0
Digital Audio Effects Filter Control
0 => Disable digital audio effects filter
1 => Enable digital audio effects filter
D0
DEEMPF
R/W
0
DeEmphasis Filter Enable
0 => Disable de-emphasis filter
1 => Enable de-emphasis filter