參數(shù)資料
型號: TLV2544EVM
廠商: Texas Instruments, Inc.
英文描述: 12-BIT ADC EVALUATION MODULE(12位ADC評估板)
中文描述: 12位ADC評估板(12位ADC的評估板)
文件頁數(shù): 28/36頁
文件大?。?/td> 775K
代理商: TLV2544EVM
3-6
Circuit Description
coupling and an input with dc offset, full-scale ADC output code is achieved
with less input amplitude. In this instance, reduce the dynamic range of the
input and adjust REF+ and REF– as necessary. When capacitor coupling is
used between the source and J2, an input range of 10 V to –10 V produces
0 V to 5 V at input channel A1.
The SMA connectors, J1, J4–J9, provide unbuffered inputs to the ADC. These
inputs are protected by diodes to prevent damage to the ADC from voltages
in excess of the supply rail voltages. Each channel has RC components used
for band limiting the input signal. The dc signal REF_CH3/7, via W3 pins 2–3,
is made available at channel A3 (TLV1504/1514/2544/TLC1514/2554) and
channel A7 (TLV1508/2548/TLC1518/2558). In this configuration the ADC op-
eration can be checked without having to apply an external input to the EVM.
When using the unbuffered inputs, the driving source impedance must be less
than 1 k
for proper slew rate of the input signal. The source must provide
enough current into 50 pF to arrive at a final voltage value within the
device-specified sampling time. Also, if the source noise is not below the 10-bit
or 12-bit level, this noise could cause jitter in the output least significant bit
(LSB).
3.2.4
Power
A balanced voltage input of
±
10 V maximum (
±
7 V minimum) and ground
should be supplied to the EVM through connector J10 with the positive supply
voltage applied to J10-1, the negative supply to J10-3, and ground to J10-2.
The operational amplifier, U1, uses the bipolar power supplies. The remainder
of the EVM uses regulated 5 V from the positive supply through the TPS7101
low dropout regulator. Switch SW1 can switch the output voltage of the
regulator from nominally 5-V to 3.3-V operation. The regulator output voltage
is divided into the digital supply (DVdd) and analog supply (AVdd) through
ferrite beads and individual filter capacitors. The 5-V or 3.3-V output powers
the following devices: U2, U3, U4, U5, U6, U7, U8, U9, U11, U12, U14, U15,
U16, U17, and U18.
The
±
7 V to
±
10 V is applied to the TLE2142 while only the positive supply
voltage is applied to the TPS7101 low-dropout regulator. The TPS7101
regulates for a 5-V or 3.3-V V
CC
such that ADC evaluation can be done at
either V
CC
through switch SW1. SW1 changes the ADC/TLC5618A DAC
voltage reference to accommodate the change in V
CC
; SW1 also changes V
CC
to the SN74AHC244. The microinverter can be used to accommodate
inversion for software interrupt processing.
3.2.5
Voltage Reference Generation
A nominal 5 V reference is supplied by the MAX6250 precision reference.
When switch SW1 is in the 5 V supply position the REF+ can be adjusted from
1.62 V – 5 V and REF– from 0 V – 2.50 V, and with 3.30 V V
CC
supply selected
REF+ ranges from 0.97 V – 3 V and REF– ranges from 0 V – 1.50 V. The
voltage differential between REF+ and REF– should always be equal to, or
greater than, 2.5 V for proper operation within the TLV1544, TLV2544,
TLV2548, TLV1504, TLV1508, TLC1514, TLC2554, TLC1518, and TLC2558
specified limits.
Ratiometric measurements are the signals that vary with the supply voltage.
If an input signal voltage is used that varies proportionately with the supply
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