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參數(shù)資料
| 型號： | TLV2354IPWRG4 |
| 廠商： | Texas Instruments |
| 文件頁數(shù)： | 5/19頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DIFF COMPARATOR QUAD 14-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 系列： | LinCMOS™ |
| 類型： | 差分 |
| 元件數(shù)： | 4 |
| 輸出類型： | CMOS，MOS，開路漏極，TTL |
| 電壓 - 電源，單路/雙路(±)： | 2 V ~ 8 V |
| 電壓 - 輸入偏移（最小值）： | 5mV @ 5V |
| 電流 - 輸入偏壓（最小值）： | 5pA @ 5V |
| 電流 - 輸出（標(biāo)準(zhǔn)）： | 20mA |
| 電流 - 靜態(tài)（最大值）： | 800µA |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 安裝類型： | 表面貼裝 |
| 包裝： | 帶卷 (TR) |
TLV2354, TLV2354Y
LinCMOS
QUADRUPLE LOW-VOLTAGE DIFFERENTIAL COMPARATORS
SLCS012C – MAY 1992 – REVISED AUGUST 2000
13
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Propagation delay time is defined as the interval between the application of an input step function and the instant when
the output crosses VO = 1 V with VDD = 3 V or when the output crosses VO = 1.4 V with VDD = 5 V. Propagation delay
time, low-to-high-level output, is measured from the leading edge of the input pulse, while propagation delay time,
high-to-low-level output, is measured from the trailing edge of the input pulse. Propagation-delay-time measurement
at low input signal levels can be greatly affected by the input offset voltage. The offset voltage should be balanced
by the adjustment at the inverting input (as shown in Figure 11) so that the circuit is just at the transition point. Then
a low signal, for example a 105-mV or 5-mV overdrive, causes the output to change state.
+
–
DUT
VDD
CL
(see Note A)
Pulse
Generator
10
10 Turn
+ 1 V
– 1 V
1 k
50
1
F
0.1
F
TEST CIRCUIT
100 mV
Input
Overdrive
tPLH
100 mV
Input
Overdrive
90%
10%
tf
tPHL
Low- to High-
Level Output
High- to Low-
Level Output
VOLTAGE WAVEFORMS
5.1 k
Input Offset Voltage
Compensation
Adjustment
90%
10%
tr
VO = 1 V With VDD = 3 V
or
VO = 1.4 V With VDD = 5 V
NOTE A: CL includes probe and jig capacitance.
Figure 11. Propagation Delay, Rise, and Fall Times Test Circuit and Voltage Waveforms
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