參數(shù)資料
型號: TLC876MDW
廠商: Texas Instruments, Inc.
英文描述: 10-BIT 20 MSPS PARALLEL OUTPUT CMOS ANALOG-TO-DIGITAL CONVERTERS
中文描述: 10位20 MSPS的并行輸出CMOS模擬數(shù)字轉(zhuǎn)換器
文件頁數(shù): 22/23頁
文件大小: 314K
代理商: TLC876MDW
TLC876M TLC876I, TLC876C
10-BIT 20 MSPS PARALLEL OUTPUT CMOS
ANALOG-TO-DIGITAL CONVERTERS
SLAS140D – JULY 1997 – REVISED MAY 2000
22
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
digital outputs
The DRV
DD
supply terminal powers each of the on-chip buffers for the output bits (D0–D9) and is a separate
lead from AV
DD
or DV
DD
. The output drivers are sized to drive a variety of logic families, while minimizing the
amount of glitch energy generated. A recommended fan-out of one keeps the capacitive load on the output data
drivers below the specified 20 pF level.
For DRV
DD
= 5 V, the output signal swing can drive both high-speed CMOS and TTL logic families. For TTL,
the on-chip output drivers are designed to support several of the high-speed TTL families (F, AS, S). For
applications where the clock rate is below 20 MSPS, other TTL families are appropriate. For interfacing with
lower voltage CMOS logic, the TLC876 sustains 20 MSPS operation with DRV
DD
= 3.3 V. Refer to logic family
data sheets for compatibility with the TLC876 digital specifications.
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