參數(shù)資料
型號(hào): TLC32046I
廠(chǎng)商: Texas Instruments, Inc.
英文描述: Wide-Band Analog Interface Circuit
中文描述: 寬帶模擬接口電路
文件頁(yè)數(shù): 22/57頁(yè)
文件大?。?/td> 297K
代理商: TLC32046I
2–8
2.15 Communications Word Sequence
In the dual-word (telephone interface) mode, there are two data words that are presented to the DSP or
μ
P
from the DR terminal. The first data word is the ADC conversion result occurring during the FSR time, and
the second is the serial data applied to DATA-DR during the FSD time. FSR is not asserted during secondary
communications and FSD is not asserted during primary communications.
DX-14 Bits Digital 11
From DSP to DAC
4 Shift
Clocks
DX-14 Bits Digital XX
From DSP
Input for D/A
Conversion
Input for Register
Program
2s Complement Output
From ADC to the DSP
2s Complement Output
From ADC to the DSP
Data From DATA-DR
to the DSP
16 bits
16 bits
Primary
Communications
Secondary
Communications
FSX
DX
FSR
DR
TLC32046
TLC32046
TLC32046
Dual-Word
(telephone interface)
Mode Only
TLC32046
Dual-Word
(telephone interface)
Mode Only
16 bits Digital From
DATA-DR to DR
FSD
TLC32046
Dual-Word
(telephone interface)
Mode Only
Figure 2–2. Primary and Secondary Communications Word Sequence
2.15.1
The data word is the 14-bit conversion result of the receive channel to the processor in 2s complement
format. With 16-bit processors, the data is 16 bits long with the two LSBs at zero.
DR Word Bit Pattern
A/D MSB
1st bit sent
D15
A/D LSB
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
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