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參數(shù)資料
| 型號(hào)： | TLC157M |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | EPROM/ROM-Based 8-Bit Microcontroller Series |
| 中文描述： | 存儲(chǔ)器/基于ROM的8位微控制器系列 |
| 文件頁數(shù)： | 30/50頁 |
| 文件大?。?/td> | 552K |
| 代理商： | TLC157M |
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CLRA
Syntax:
Operands:
Operation:
Clear ACC
CLRA
None
00h
à
ACC;
1
à
Z
Z
The ACC register is cleared. Zero bit (Z) is set.
1
Status Affected:
Description:
Cycles:
CLRR
Syntax:
Operands:
Operation:
Clear R
CLRR R
0
≤
R
≤
63
00h
à
R;
1
à
Z
Z
The contents of register ‘R’ are cleared and the Z bit is set.
1
Status Affected:
Description:
Cycles:
CLRWDT
Syntax:
Operands:
Operation:
Clear Watchdog Timer
CLRWDT
None
00h
à
WDT;
00h
à
WDT prescaler (if assigned);
1
à
TO;
1
à
PD
TO,PD
The CLRWDT instruction resets the WDT. It also resets the prescaler, if the prescaler is
assigned to the WDT and not Timer0. Status bitsTO and PD are set.
1
Status Affected:
Description:
Cycles:
COMR
Syntax:
Operands:
Complement R
COMR R, d
0
≤
R
≤
63
d
∈
[0,1]
R
à
dest
Z
The contents of register ‘R’ are complemented. If ‘d’ is 0 the result is stored in the ACC
register. If ‘d’ is 1 the result is stored back in register ‘R’.
1
Operation:
Status Affected:
Description:
Cycles:
DAA
Syntax:
Operands:
Operation:
Status Affected:
Description:
Adjust ACC’s data format from HEX to DEC
DAA
None
ACC(hex)
à
ACC(dec)
C
Convert the ACC data from hexadecimal to decimal format after any addition
operation and restored to ACC.
1
Cycles:
TLC
TLC156
Rev0.95 Nov 20, 2003
P.2/TLC156
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PDF描述 |
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| TLC157P | EPROM/ROM-Based 8-Bit Microcontroller Series |
| TLC157R | EPROM/ROM-Based 8-Bit Microcontroller Series |
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相關(guān)代理商/技術(shù)參數(shù) |
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| TLC157R | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EPROM/ROM-Based 8-Bit Microcontroller Series |
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