參數(shù)資料
型號: TLC154
廠商: Electronic Theatre Controls, Inc.
英文描述: EPROM/ROM-Based 8-Bit Microcontroller Series
中文描述: 存儲器/基于ROM的8位微控制器系列
文件頁數(shù): 29/50頁
文件大?。?/td> 552K
代理商: TLC154
BCR
Syntax:
Operands:
Clear Bit in R
BCF R, b
0
R
63
0
b
7
0
à
R<b>
None
Clear bit ‘b’ in register ‘R’.
1
Operation:
Status Affected:
Description:
Cycles:
BSR
Syntax:
Operands:
Set Bit in R
BSR R, b
0
R
63
0
b
7
1
à
R<b>
None
Set bit ‘b’ in register ‘R’.
1
Operation:
Status Affected:
Description:
Cycles:
BTRSC
Syntax:
Operands:
Test Bit in R, Skip if Clear
BTRSC R, b
0
R
63
0
b
7
Skip if R<b> = 0
None
If bit ‘b’ in register ‘R’ is 0 then the next instruction is skipped.
If bit ‘b’ is 0 then next instruction fetched during the current instruction execution is discarded,
and a NOP is executed instead making this a 2-cycle instruction..
1(2)
Operation:
Status Affected:
Description:
Cycles:
BTRSS
Syntax:
Operands:
Test Bit in R, Skip if Set
BTRSS R, b
0
R
63
0
b
7
Skip if R<b> = 1
None
If bit ‘b’ in register ‘R’ is ‘1’ then the next instruction is skipped.
If bit ‘b’ is ‘1’, then the next instruction fetched during the current instruction execution, is
discarded and a NOP is executed instead, making this a 2-cycle instruction.
1(2)
Operation:
Status Affected:
Description:
Cycles:
CALL
Syntax:
Operands:
Operation:
Subroutine Call
CALL I
0
I
1023
PC +1
à
Top of Stack;
I
à
PC<9:0>
PCHBUF<2>
à
PC<10>
None
Subroutine call. First, return address (PC+1) is pushed onto the stack. The 10-bit immediate
address is loaded into PC bits <10:0>. CALL is a two-cycle instruction.
2
Status Affected:
Description:
Cycles:
TLC
TLC156
Rev0.95 Nov 20, 2003
P.2/TLC156
相關(guān)PDF資料
PDF描述
TLC154D EPROM/ROM-Based 8-Bit Microcontroller Series
TLC154EP EPROM/ROM-Based 8-Bit Microcontroller Series
TLC154ER EPROM/ROM-Based 8-Bit Microcontroller Series
TLC154P EPROM/ROM-Based 8-Bit Microcontroller Series
TLC154R EPROM/ROM-Based 8-Bit Microcontroller Series
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