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參數(shù)資料
| 型號： | TISP83121D-S |
| 廠商： | BOURNS INC |
| 元件分類： | 浪涌電流限制器 |
| 英文描述： | 22 A, SILICON SURGE PROTECTOR |
| 封裝： | ROHS COMPLIANT, SOIC-8 |
| 文件頁數(shù)： | 2/5頁 |
| 文件大?。?/td> | 180K |
| 代理商： | TISP83121D-S |
FEBRUARY 1999 – REVISED JANUARY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
Electrical Characteristics, TJ = 25 °C (Unless Otherwise Noted)
TISP83121D Unidirectional P & N-Gate Protector
Absolute Maximum Ratings
Thermal Characteristics
Parameter
Test Conditions
Min
Typ
Max
Unit
ID
Off-state current
Vd = 70 V, IG =0
1
A
IDRM
Repetitive peak off-
state current
Vd =VDRM = 100 V, IG = 0, 0 °C to 70 °C10
A
IH
Holding current
IT = 1 A, di/dt = -1A/ms
TJ = 0 to 70 °C
TJ = 25 °C
TJ = 70 °C
90
60
300
mA
IR
Reverse current
VR = 0.3 V
1mA
IG1T
Gate G1 trigger current
IT = +1 A, tp(g) =20 s
+200
mA
IG2T
Gate G2 trigger current
IT = +1 A, tp(g) =20 s
-180
mA
VG1T
G1-K trigger voltage
IT = +1 A, tp(g) =20 s
+1.8
V
VG2T
G2-A trigger voltage
IT = +1 A, tp(g) =20 s
-1.8
V
CAK
Anode-cathode off-
state capacitance
f = 1 MHz, Vd =1V rms, VD =5V, IG = 0 (see Note 3)
100
pF
NOTE
3: These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured
device terminals are a.c. connected to the guard terminal of the bridge.
Parameter
Test Conditions
Min
Typ
Max
Unit
R θJA
Junction to free air thermal resistance
TA
T
TSM(900)
= 25 °C, EIA/JESD51-3 PCB,
EIA/JESD51-2 environment, I = I
105
°C/W
Rating
Symbol
Value
Unit
Repetitive peak off-state voltage, 0 °C to 70 °CVDRM
100
V
Non-repetitive peak on-state pulse current (see Notes 1 and 2)
ITSP
A
10/1000
(GR-1089-CORE, open-circuit voltage wave shape 10/1000
150
5/310
(CCITT K20/21, open-circuit voltage wave shape 7 kV, 10/700
250
8/20 s
s
s)
s
(ANSI C62.41, open-circuit voltage wave shape 1.2/50
500
Non-repetitive peak on-state current, 50 Hz, halfwave rectified sinewave, (see Notes 1 and 2)
100 ms
1 s
900 s
ITSM
22
8
3
A
Junction temperature
TJ
-40 to +150
°C
Storage temperature range
Tstg
-65 to +150
°C
NOTES: 1. Initially the protector must be in thermal equilibrium with 0 °C < TJ < 70 °C. The surge may be repeated after the device returns to
its initial conditions. For operation at the rated current value, pins 1, 4, 5 and 8 must be connected together.
2. Above 70 °C, derate linearly to zero at 150 °C lead temperature.
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