參數(shù)資料
型號: TDA9887
廠商: NXP Semiconductors N.V.
英文描述: I2C-bus controlled multistandard alignment-free IF-PLL demodulator with FM radio
中文描述: 的I2C總線控制的多標準對準無中頻鎖相環(huán)調(diào)頻廣播解調(diào)器
文件頁數(shù): 17/58頁
文件大?。?/td> 308K
代理商: TDA9887
2004 Aug 25
17
Philips Semiconductors
Product specification
I
2
C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887
9.2.1
S
UBADDRESS
If more than one data byte is transmitted, then auto-increment is performed: starting from the transmitted subaddress
and auto-increment of subaddress in accordance with the order of Table 10.
Table 10
Definition of the subaddress (second byte after slave address); note 1
Notes
1.
2.
3.
X = don’t care.
Bit A7 = 1 is not allowed.
Bits A6 to A2 will be ignored by the internal hardware.
9.2.2
D
ATA BYTE FOR SWITCHING MODE
Table 11
Bit description of SAD register for switching mode (SAD = 00)
REGISTER
MSB
LSB
A7
(2)
A6
(3)
A5
(3)
A4
(3)
A3
(3)
A2
(3)
A1
A0
SAD for switching mode
SAD for adjust mode
SAD for data mode
0
0
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
1
0
1
0
BIT
VALUE
DESCRIPTION
B7
Output port 2 e.g. for SAW switching or AGC monitoring
high-impedance, disabled or HIGH
low-impedance, active or LOW
Output port 1 e.g. for SAW switching or external AGC input
high-impedance, disabled or HIGH
low-impedance, active or LOW
Forced audio mute
on
off
TV standard modulation and radio mode
positive AM TV; note 1
FM radio; note 2
negative FM TV
FM radio; note 2
Carrier mode
QSS mode
intercarrier mode
Auto mute of FM AF output
active
inactive
1
0
B6
1
0
B5
1
0
B4 and B3
00
01
10
11
B2
1
0
B1
1
0
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