參數(shù)資料
型號(hào)： TDA9885
廠商： NXP Semiconductors N.V.
英文描述： I2C-bus controlled single and multistandard alignment-free IF-PLL demodulators
中文描述： 的I2C控制的單一和多路巴士免費(fèi)中頻鎖相環(huán)解調(diào)器
文件頁(yè)數(shù)： 11/56頁(yè)
文件大?。?/td> 248K
代理商： TDA9885
2003 Oct 02
11
Philips Semiconductors
Product specification
I
2
C-bus controlled single and multistandard
alignment-free IF-PLL demodulators
TDA9885; TDA9886
8.5
VCO and divider
The VCO of the VIF-FPLL operates as an integrated low
radiation relaxation oscillator at double the picture carrier
frequency. The control voltage, required to tune the VCO
to double the picture carrier frequency, is generated at the
loop filter by the frequency phase detector. The possible
frequency range is 50 to 140 MHz (typical value).
The oscillator frequency is divided-by-two to provide two
differential square wave signals with exactly 90 degrees
phase difference, independent of the frequency, for use in
the FPLL detectors, the video demodulator and the
intercarrier mixer.
8.6
AFC and digital acquisition help
Each relaxation oscillator of the VIF-PLL and FM-PLL
demodulator has a wide frequency range. To prevent false
locking of the PLLs and with respect to the catching range,
the digital acquisition help provides an individual control,
until the frequency of the VCO is within the preselected
standard dependent lock-in window of the PLL.
The in-window and out-window control at the FM-PLL is
additionally used to mute the audio stage (if auto mute is
selected via the I
2
C-bus).
The working principle of the digital acquisition help is as
follows. The PLL VCO output is connected to a down
counter which has a predefined start value (standard
dependent). The VCO frequency clocks the down counter
for a fixed gate time. Thereafter, the down counter stop
value is analysed. In case the stop value is higher (lower)
than the expected value range, the VCO frequency is
lower (higher) than the wanted lock-in window frequency
range. A positive (negative) control current is injected into
the PLL loop filter and consequently the VCO frequency is
increased (decreased) and a new counting cycle starts.
The gate time as well as the control logic of the acquisition
help circuit is dependent on the precision of the reference
signal at pin REF. Operation as a crystal oscillator is
possible as well as connecting this input via a serial
capacitor to an external reference frequency, e.g. the
tuning system oscillator.
The AFC signal is derived from the corresponding down
counter stop value after a counting cycle. The last four bits
are latched and can be read out via the I
2
C-bus
(see Table 7).Alsothedigital-to-analogconvertedvalueis
given as current at pin AFC.
8.7
Video demodulator and amplifier
The video demodulator is realized by a multiplier which is
designed for low distortion and large bandwidth. The VIF
signal is multiplied with the ‘in phase’ signal of the VIF-PLL
VCO.
The demodulator output signal is fed into the video
preamplifier via a level shift stage with integrated low-pass
filter to achieve carrier harmonics attenuation.
The output signal of the preamplifier is fed to the VIF-AGC
detector(see Section 8.3)andinthesoundtrapmodealso
fed internally to the integrated sound carrier trap
(see Section 8.8). The differential trap output signal is
converted and amplified by the following postamplifier.
The video output level at pin CVBS is 2 V (p-p).
In the bypass mode the output signal of the preamplifier is
fed directly through the postamplifier to pin CVBS. The
outputvideolevelis1.1 V (p-p)forusinganexternalsound
trap with 10 % overall loss.
Noise clipping is provided in both cases.
8.8
Sound carrier trap
The sound carrier trap consists of a reference filter, a
phase detector and the sound trap itself.
A sound carrier reference signal is fed into the reference
low-pass filter and is shifted by nominal 90 degrees. The
phasedetectorcomparestheoriginalreferencesignalwith
the signal shifted by the reference filter and produces a
DC voltage by charging or discharging an integrated
capacitor with a current proportional to the phase
difference between both signals, respectively to the
frequency error of the integrated filters. The DC voltage
controls the frequency position of the reference filter and
the sound trap. So the accurate frequency position for the
different standards is set by the sound carrier reference
signal.
The sound trap itself is constructed of three separate traps
to realize sufficient suppression of the first and second
sound carriers.
8.9
SIF amplifier
The SIF amplifier consists of three AC-coupled differential
stages. Gain control is performed by emitter degeneration.
The total gain control range is typically 66 dB. The
differentialinputimpedanceistypically2 k
inparallelwith
3 pF.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TDA9885HN/V3 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:I2C-bus controlled single and multistandard alignment-free IF-PLL demodulators
TDA9885HN/V3,118 功能描述:調(diào)節(jié)器/解調(diào)器 TDA9885HN/HVQFN32/REEL13//V3 RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel
TDA9885HN/V3,518 功能描述:調(diào)節(jié)器/解調(diào)器 DEMODUL NEG MODULTN RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel
TDA9885HN/V3/S1,11 功能描述:調(diào)節(jié)器/解調(diào)器 DEMODUL NEG MODULTN RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel
TDA9885HN/V3/S1-T 功能描述:調(diào)節(jié)器/解調(diào)器 DEMODUL NEG MODULTN VIF AND SIF RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel
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