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參數(shù)資料
| 型號： | TDA9885 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | I2C-bus controlled single and multistandard alignment-free IF-PLL demodulators |
| 中文描述： | 的I2C控制的單一和多路巴士免費(fèi)中頻鎖相環(huán)解調(diào)器 |
| 文件頁數(shù)： | 10/56頁 |
| 文件大?。?/td> | 248K |
| 代理商： | TDA9885 |
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2003 Oct 02
10
Philips Semiconductors
Product specification
I
2
C-bus controlled single and multistandard
alignment-free IF-PLL demodulators
TDA9885; TDA9886
8
FUNCTIONAL DESCRIPTION
Figure 1 shows the simplified block diagram of the device
which comprises the following functional blocks:
VIF amplifier
Tuner AGC and VIF-AGC
VIF-AGC detector
Frequency Phase-Locked Loop (FPLL) detector
VCO and divider
AFC and digital acquisition help
Video demodulator and amplifier
Sound carrier trap
SIF amplifier
SIF-AGC detector
Single reference QSS mixer
AM demodulator
FM demodulator and acquisition help
Audio amplifier and mute time constant
Internal voltage stabilizer
I
2
C-bus transceiver and MAD (module address).
8.1
VIF amplifier
The VIF amplifier consists of three AC-coupled differential
stages. Gain control is performed by emitter degeneration.
The total gain control range is typically 66 dB. The
differentialinputimpedanceistypically2 k
inparallelwith
3 pF.
8.2
Tuner AGC and VIF-AGC
This block adapts the voltages, generated at the VIF-AGC
and SIF-AGC detectors, to the internal signal processing
at the VIF and SIF amplifiers and performs the tuner AGC
control current generation. The onset of the tuner AGC
control current generation can be set either via the I
2
C-bus
(see Table 13) or optionally by a potentiometer at pin TOP
(in case that the I
2
C-bus information cannot be stored,
related to the device). The presence of a potentiometer is
automatically detected and the I
2
C-bus setting is disabled.
Furthermore, derived from the AGC detector voltage, a
comparator is used to test if the corresponding VIF input
voltage is higher than 200
μ
V. This information can be
read out via the I
2
C-bus (bit VIFLEV = 1).
8.3
VIF-AGC detector
Gaincontrolisperformedbysyncleveldetection(negative
modulation) or peak white detection (positive modulation).
Fornegativemodulation, thesynclevelvoltageisstoredat
an integrated capacitor by means of a fast peak detector.
This voltage is compared with a reference voltage
(nominal sync level) by a comparator which charges or
discharges the integrated AGC capacitor for the
generation of the required VIF gain. The time constants for
decreasing or increasing the gain are nearly equal and the
total AGC reaction time is fast to cope with ‘a(chǎn)eroplane
fluttering’.
For positive modulation, the white peak level voltage is
compared with a reference voltage (nominal white level)
by a comparator which charges (fast) or discharges (slow)
the external AGC capacitor directly for the generation of
the required VIF gain. The need of a very long time
constant for VIF gain increase is because the peak white
level may appear only once in a field. In order to reduce
this time constant, an additional level detector increases
the discharging current of the AGC capacitor (fast mode)
in the event of a decreasing VIF amplitude step controlled
by the detected actual black level voltage. The threshold
level for fast mode AGC is typically
6 dB video amplitude.
The fast mode state is also transferred to the SIF-AGC
detector for speed-up. In case of missing peak white
pulses, the VIF gain increase is limited to typically +3 dB
by comparing the detected actual black level voltage with
a corresponding reference voltage.
8.4
FPLL detector
The VIF amplifier output signal is fed into a frequency
detector and into a phase detector via a limiting amplifier
for removing the video AM.
During acquisition the frequency detector produces a
current proportional to the frequency difference between
the VIF and the VCO signals. After frequency lock-in the
phase detector produces a current proportional to the
phase difference between the VIF and the VCO signals.
The currents from the frequency and phase detectors are
charged into the loop filter which controls the VIF VCO and
locks it to the frequency and phase of the VIF carrier.
For a positive modulated VIF signal, the charging currents
are gated by the composite sync in order to avoid signal
distortion in case of overmodulation. The gating depth is
switchable via the I
2
C-bus.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TDA9885HN/V3 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:I2C-bus controlled single and multistandard alignment-free IF-PLL demodulators |
| TDA9885HN/V3,118 | 功能描述:調(diào)節(jié)器/解調(diào)器 TDA9885HN/HVQFN32/REEL13//V3 RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
| TDA9885HN/V3,518 | 功能描述:調(diào)節(jié)器/解調(diào)器 DEMODUL NEG MODULTN RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
| TDA9885HN/V3/S1,11 | 功能描述:調(diào)節(jié)器/解調(diào)器 DEMODUL NEG MODULTN RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
| TDA9885HN/V3/S1-T | 功能描述:調(diào)節(jié)器/解調(diào)器 DEMODUL NEG MODULTN VIF AND SIF RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
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