參數(shù)資料
型號(hào): TDA8761AM
廠商: NXP SEMICONDUCTORS
元件分類: ADC
英文描述: 9-bit analog-to-digital converter for digital video
中文描述: 1-CH 9-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
封裝: PLASTIC, SOT-341-1, SSOP-28
文件頁數(shù): 8/24頁
文件大?。?/td> 166K
代理商: TDA8761AM
1998 Nov 03
8
Philips Semiconductors
Product specification
9-bit analog-to-digital converter
for digital video
TDA8761A
B
ANDWIDTH
(f
clk
= 30 MH
Z
)
B
analog bandwidth
full-scale sine wave;
note 6
75% full-scale sine wave;
note 6
small signal at mid-scale;
V
I
=
±
10 LSB at
code 256; note 6
full-scale square wave;
Fig.6; note 7
full-scale square wave;
Fig.6; note 7
15
MHz
20
MHz
350
MHz
t
STLH
analog input settling time
LOW-to-HIGH
analog input settling time
HIGH-to-LOW
1.5
3.0
ns
t
STHL
1.5
3.0
ns
H
ARMONICS
(f
clk
= 30 MH
Z
); see Figs 7 and 8
THD
total harmonic distortion
f
i
= 10 MHz
56
dB
S
IGNAL
-
TO
-
NOISE RATIO
; see Figs 7 and 8; note 8
SNR
signal-to-noise ratio (full scale)
without harmonics;
f
clk
= 30 MHz;
f
i
= 10 MHz
53
55
dB
E
FFECTIVE BITS
; see Figs 7 and 8; note 8
ENOB
effective bits
f
clk
= 30 MHz
f
i
= 4.43 MHz
f
i
= 10 MHz
8.8
8.2
bits
bits
T
WO
-
TONE
; note 9
TTIR
two-tone intermodulation
rejection
f
clk
= 30 MHz
56
dB
B
IT ERROR RATE
BER
bit error rate
f
clk
= 30 MHz;
f
i
= 10 MHz;
V
I
=
±
16 LSB at
code 256
10
13
times/
sample
D
IFFERENTIAL GAIN
; note 10
G
diff
differential gain
f
clk
= 30 MHz;
PAL modulated ramp
0.5
%
D
IFFERENTIAL PHASE
; note 10
diff
differential phase
f
clk
= 30 MHz;
PAL modulated ramp
0.3
°
C
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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