參數(shù)資料
型號(hào): TDA8761AM
廠商: NXP SEMICONDUCTORS
元件分類: ADC
英文描述: 9-bit analog-to-digital converter for digital video
中文描述: 1-CH 9-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
封裝: PLASTIC, SOT-341-1, SSOP-28
文件頁數(shù): 2/24頁
文件大?。?/td> 166K
代理商: TDA8761AM
1998 Nov 03
2
Philips Semiconductors
Product specification
9-bit analog-to-digital converter
for digital video
TDA8761A
FEATURES
9-bit resolution
Sampling rate up to 40 MHz
DC sampling allowed
One clock cycle conversion only
High signal-to-noise ratio over a large analog input
frequency range (8.2 effective bits at 10 MHz full-scale
input at f
clk
= 30 MHz)
No missing codes guaranteed
In Range (IR) CMOS output
Levels TTL and CMOS compatible digital inputs
3 to 5 V CMOS digital outputs
Low-level AC clock input signal allowed
External reference voltage regulator
Power dissipation only 158 mW (typical)
Low analog input capacitance, no buffer amplifier
required
No sample-and-hold circuit required.
APPLICATIONS
Analog-to-digital conversion for:
Video data digitizing
Digital Video Broadcasting (DVB)
Cable TV.
GENERAL DESCRIPTION
The TDA8761A is a 9-bit Analog-to-Digital Converter
(ADC) for professional video and digital video set box
applications. It converts the analog input signal into 9-bit
binary-coded digital words at a maximum sampling rate of
40 MHz. Its linearity performance ensures the required
conversion accuracy in the event of 256-QAM
demodulator concept and for all symbol frequencies.
All digital inputs and outputs are TTL and CMOS
compatible, although a low-level sine wave clock input
signal is allowed.
QUICK REFERENCE DATA
Note
1.
f
i
= 10 MHz and f
clk
= 30 MHz; f
i
= 8 MHz and f
clk
= 20 MHz.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
CCA
V
CCD
V
CCO
I
CCA
I
CCD
I
CCO
INL
AINL
analog supply voltage
digital supply voltage
output stages supply voltage
analog supply current
digital supply current
output stages supply current
integral non-linearity
AC integral non-linearity
4.75
4.75
3.0
40
5.0
5.0
3.3
18
13
1
±
0.8
±
0.75
±
0.5
±
0.3
±
0.5
±
0.3
158
5.25
5.25
5.25
24
18
2
±
1.6
0.9
±
0.75
±
0.7
±
0.75
±
0.5
173
V
V
V
mA
mA
mA
LSB
LSB
LSB
LSB
LSB
LSB
MHz
mW
f
clk
= 30 MHz; ramp input
f
clk
= 30 MHz; ramp input
full-scale input sine wave; note 1
50% full-scale input sine wave; note 1
f
clk
= 30 MHz; ramp input
full-scale input sine wave; note 1
50% full-scale input sine wave; note 1
DNL
ADNL
differential non-linearity
AC differential non-linearity
f
clk(max)
P
tot
maximum clock frequency
total power dissipation
相關(guān)PDF資料
PDF描述
TDA8761 9-bit analog-to-digital converter for digital video
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