參數(shù)資料
型號(hào)： TDA7522
廠商： 意法半導(dǎo)體
英文描述： Digital Servo & Decoder(用于CD-ROM的數(shù)字伺服和解碼器)
中文描述： 數(shù)字伺服
文件頁(yè)數(shù)： 14/23頁(yè)
文件大?。?/td> 183K
代理商： TDA7522
TDA7522
14/23
Interrupt management it is fairly flexible, in detail, when an interrupt is served the I flag of the ST7 is au-
tomatically set (that means no other interrupts are served) and it is reset again only when the routine ends.
No interrupts can be missed because of the internal software-based acknowledgement scheme for periph-
erals. In order to reset an interrupt coming from a peripheral you have to write to '0' a relevant flag inside
it. With the TDA7522 interrupt mask register you just prevent the interrupt signal from coming to the ITC
(interrupt controller) and so you can change the priority without losing any interrupt.
4.3 Development Version Memory Configuration
For system application development a dedicated version will be available: the development version gives
the possibility of:
– use the ST7 emulator, for sw debug purpose;
– use of program RAM or ROM for sw execution and modification.
See appendix B for detail about memory map and TDA7522 operating modalities as:
– TDA7522 booting through I2C
– TDA7522 booting from PROM
– TDA7522 booting from PRAM.
When RAM is selected, all application sw shall be loaded through I2C, using the facility as gives by the
boot ROM.
When RAM configuration is selected, memory addresses are just overlapping the ROM defined in memory
map reported in appendix B.
TDA7522 development version can work also with emulator; refer to appendix B about the way to enter in
“ST7 emulation” mode.
NOTICE: due to different environment the following registers can be different between various ver-
sions:
– IIC register 27h: boot bit will disappear in production version
– KIF registers 75h and 76h are not available on development version
– Mux Registers 93h and 94h will both be available on production version.
5.0 FUNCTION DESCRIPTION
5.1 ST7
ST7 is based around an industry standard 8 bit core and offers an enhanced instruction set. The processor
runs with 8MHz internal clock. Due to fully static design of this device, operation down to DC is possible.
Under software control the ST7 can be placed in Wait or Halt mode for reducing power consumption. ST7
can switch off crystal clock to disable complete functions of IC as well.
The enhanced instruction set and addressing modes afford real programming potential; in addition to stan-
dard 8 bit data management the ST7 features true bit manipulation, 8x8 unsigned multiplication and indi-
rect addressing modes. The device includes a CPU, ROM, RAM, I/O, General I/O Port, 16 interrupt
encoder, timer.
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