參數(shù)資料
型號: TDA7407
廠商: STMICROELECTRONICS
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP44
封裝: 10 X 10 MM, 1.40 MM HEIGHT, LQFP-44
文件頁數(shù): 14/46頁
文件大?。?/td> 692K
代理商: TDA7407
Obsolete
Product(s)
- Obsolete
Product(s)
TDA7407
Multipath detector
5.1
Description of the audioprocessor part
5.1.1
Input multiplexer
CD quasi differential
Cassette stereo
Phone differential
AM mono
Stereo decoder input.
5.1.2
Input stages
Most of the input stages have remained the same as in preceeding ST audioprocessors with
the exception of the CD inputs (see Figure 7). In the meantime there are some CD players
on the market having a significant high source impedance which strongly affects the
common mode rejection of the normal differential input stage. The additional buffer of the
CD input avoids this drawback and offers the full common mode rejection even with those
CD players.
The output of the CD stage is permanently available of the CD out-pins
5.1.3
AutoZero
In order to reduce the number of pins, there is no AC coupling between the In-Gain and the
following stage, so that any offset generated by or before the In-Gain stage would be
transferred or even amplified to the output. To avoid that effect a special offset cancellation
stage called AutoZero is implemented.
This stage is located before the volume block to eliminate all offsets generated by the stereo
decoder, the input stage and the In-Gain (please notice that externally generated offsets,
e.g. generated through the leakage current of the coupling capacitors, are not cancelled).
Auto-zeroing is started every time the DATA-BYTE 0 is selected and takes a time of max.
0.3ms. To avoid audible clicks the audioprocessor is muted before the volume stage during
this time.
5.1.4
AutoZero remain
In some cases, for example if the
μP is executing a refresh cycle of the I2C bus
programming, it is not useful to start a new AutoZero action because no new source is
selected and an undesired mute would appear at the outputs. For such applications the
TDA7407 could be switched in the "Auto Zero Remain mode" (Bit 6 of the subaddress byte).
If this bit is set to high, the DATABYTE 0 could be loaded without invoking the AutoZero and
the old adjustment value remains.
5.1.5
Multiplexer output
The output signal of the input multiplexer is available at separate pins (please see the block
diagram). This signal represents the input signal amplifier by the In-Gain stage and is also
going into the mixer stage.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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