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參數(shù)資料
| 型號： | TDA7313N |
| 廠商： | 意法半導體 |
| 英文描述： | Digital Controlled Stereo Audio Processor with Loudness(數(shù)控立體聲音頻處理器) |
| 中文描述： | 數(shù)控立體聲音頻處理器響度（數(shù)控立體聲音頻處理器） |
| 文件頁數(shù)： | 9/14頁 |
| 文件大?。?/td> | 137K |
| 代理商： | TDA7313N |
SOFTWARE SPECIFICATION
Interface Protocol
The interfaceprotocol comprises:
A startcondition (s)
A chip addressbyte, containingthe TDA7313N
address(the 8th bit of the bytemust be 0). The
TDA7313N must always acknowledge at the
end of each transmittedbyte.
A sequenceof data (N-bytes + acknowledge)
A stopcondition (P)
TDA7313N ADDRESS
MSB
1
first byte
0
0
LSB
0
MSB
LSB
MSB
LSB
S
0
1
0
0
ACK
DATA
ACK
DATA
ACK
P
Data Transferred (N-bytes + Acknowledge)
ACK = Acknowledge
S = Start
P = Stop
MAX CLOCK SPEED 100kbits/s
SOFTWARE SPECIFICATION
Chip address
1
MSB
0
0
0
1
0
0
0
LSB
DATA BYTES
MSB
0
1
1
1
1
0
0
0
LSB
A0
A0
A0
A0
A0
S0
C0
C0
FUNCTION
0
1
1
0
0
1
1
1
B2
0
1
0
1
0
1
1
B1
B1
B1
B1
B1
G1
0
1
B0
B0
B0
B0
B0
G0
C3
C3
A2
A2
A2
A2
A2
S2
C2
C2
A1
A1
A1
A1
A1
S1
C1
C1
Volume control
Speaker ATT LR
Speaker ATT RR
Speaker ATT LF
Speaker ATT RF
Audio switch
Bass control
Treble control
Ax = 1.25dB steps; Bx = 10dB steps; Cx = 2dB steps; Gx = 3.75dB steps
Figure 18:
TimingDiagramof I
2
CBUS
Figure 19:
Acknowledgeon the I
2
CBUS
TDA7313N
9/14
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TDA7313ND | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:DIGITAL CONTROLLED STEREO AUDIO PROCESSOR WITH LOUDNESS |
| TDA7314 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:DIGITAL CONTROLLED AUDIO PROCESSOR WITH LOUDNESS |
| TDA7315 | 功能描述:音頻 DSP Digital Audio Proc RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風格: 封裝 / 箱體: 封裝:Tube |
| TDA7315D | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:DIGITAL CONTROLLED AUDIO PROCESSOR |
| TDA7316 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:FOUR BANDSDIGITAL CONTROLLED GRAPHIC EQUALIZER |
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