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參數(shù)資料
| 型號： | TDA10045 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | DVB-T channel receiver |
| 中文描述： | DVB - T通道接收器 |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 94K |
| 代理商： | TDA10045 |
2001 Nov 08
5
Philips Semiconductors
Product specification
DVB-T channel receiver
TDA10045H
PINNING
SYMBOL
PIN
TYPE
O
DESCRIPTION
V
DDD33
V
SSD
DS_SPARE3
1
2
3
digital supply voltage for the pads (3.3 V typ.)
digital ground supply (0 V
spare delta-sigma output; managed by the DSP to generate an analog level
(after a RC low-pass filter)
output value from the Delta-Sigma modulator, used to control a log-scaled
amplifier (after analog filtering)
extra I
2
C-bus clock to download DSP code from an external EEPROM (optional
mode); can be connected to the master I
2
C-bus
digital supply voltage for the pads (3.3 V typ.)
digital ground supply (0 V)
extra I
2
C-bus data bus to download DSP code from an external EEPROM
(optional mode). It can be connected to the master I
2
C-bus; this pin is
open-drain which requires an external pull-up resistor (to V
DDD33
or V
DDD50
),
even if not used.
tuner I
2
C-bus serial clock signal; this signal is derived from the master SCL and
is open-drain which requires an external pull-up resistor (to V
DDD33
or V
DDD50
),
even if not used
tuner I
2
C-bus serial data signal; this signal is derived from the master SDA and
is open-drain which requires an external pull-up resistor (to V
DDD33
or V
DDD50
),
even if not used
I
2
C-bus master serial clock; up to 700 kbit/s
I
2
C-bus master serial data input/output, open-drain I/O pad, which requires an
external pull-up resistor (to V
DDD33
or V
DDD50
)
not connected
asynchronous reset signal; active LOW
EEPADDR is the LSB of the I
2
C-bus address of the EEPROM. The MSBs are
internally set to 101000. Therefore the complete I
2
C-bus address of the
EEPROM is (MSB to LSB): 1, 0, 1, 0, 0, 0, EEPADDR.
SADDR[1:0] are the 2 LSBs of the I
2
C-bus address of the TDA10045; the MSBs
are internally set to 00010; therefore the complete I
2
C-bus address of the
TDA10045 is (MSB to LSB): 0, 0, 0, 1, 0, SADDR[1] and SADDR[0]
digital supply voltage for the core (1.8 V typ.)
digital ground supply (0 V)
test mode bus; for test purpose; must be set to ‘0000’
scan enable for production test; connected to GND
digital supply voltage (5 V typ.); can be set to 3.3 V (with caution) if the 5 V
tolerant I/O is not required
digital ground supply (0 V)
processor control, boot mode; if set to logic 0, the DSP downloads the software
from an external EEPROM on the dedicated I
2
C-bus (pins SDA_EEP and
SCL_EEP). If set to logic 1 the software is downloaded in the I
2
C-bus register
CODE_IN from the host; in this case the external EEPROM is not needed.
spare inputs
VAGC
4
O
SCL_EEP
5
O
V
DDD33
V
SSD
SDA_EEP
6
7
8
I/OD
SCL_TUN
9
OD
(1)
SDA_TUN
10
I/OD
SCL
SDA
11
12
I
(2)
I/OD
n.c.
CLR#
EEPADDR
13
14
15
I
(2)
I
(2)
SADDR[1:0]
16 and 17
I
(2)
V
DDD18
V
SSD
TM[3:0]
SCAN_EN
V
DDD50
18
19
20 to 23
24
25
I
(2)
I
(2)
V
SSD
DWNLOAD
26
27
I
(2)
SP_IN[1:0]
28 and 29
I
(2)
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TDA10045H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:DVB-T channel receiver |
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| TDA10046HT | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip DVB-T channel |
| TDA10048HC/C200,557 | 制造商:NXP Semiconductors 功能描述:PHATDA10048HC/C200.557 REEL |
| TDA10048HN/C200,51 | 制造商:Entropic Communications 功能描述:TDA10048HN/HVQFN48/REEL13DP//C |
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