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參數(shù)資料
| 型號： | TCM320AC54N |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | Codec |
| 英文描述： | MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER |
| 中文描述： | 整體式串行接口的PCM編解碼器和過濾器 |
| 文件頁數(shù)： | 12/23頁 |
| 文件大小： | 317K |
| 代理商： | TCM320AC54N |
TCM320AC36, TCM320AC37
VOICE-BAND AUDIO PROCESSORS (VBAP
)
SLWS003C – MAY 1992 – REVISED APRIL – 1998
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
N–1
N
1
2
3
4
N–1
N
1
N+1
N
N–1
N–2
4
3
2
1
0
DCLKR
FSR
DIN
Receive Time Slot
tsu(FSR)
See Note A
th(FSR)
See Note B
th(DIN)
tsu(DIN)
80%
20%
80%
80%
N–2
See Note C
20%
NOTES: A. This window is allowed for FSR high (tsu(FSR) max determined by data collision considerations).
B. This window is allowed for FSR low.
C. Transitions are measured at 50%.
Figure 3. Variable-Data Rate Mode, Receive Side Timing Diagram
4
N
N–1
N–2
3
2
1
N+1
N
N–1
N–2
4
3
2
1
0
DCLKX
FSX
DOUT
tsu(FSX)
Transmit Time Slot
th(FSX)
See Note B
tpd8
tpd7
tpd6
See Note A
80%
20%
80%
20%
80%
See Note C
NOTES: A. This window is allowed for FSX high.
B. This window is allowed for FSX low without data repetition.
C. Transitions are measured at 50%.
Figure 4. Variable-Data Rate Mode, Transmit Side Timing Diagram
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