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參數(shù)資料
| 型號(hào)： | TC9WMA1FK |
| 廠商： | Toshiba Corporation |
| 英文描述： | TOSHIBA CMOS Digital Integrated Circuits Silicon Monolithic |
| 中文描述： | 東芝的CMOS數(shù)字集成電路硅單片 |
| 文件頁(yè)數(shù)： | 3/12頁(yè) |
| 文件大?。?/td> | 189K |
| 代理商： | TC9WMA1FK |
TC9WMA1FK
2001-10-16
3
Functional Description
1. Types of Instructions
Command
C3
Operation
Address
C0
C1 C2
Data
Read
A0~A6, 0
1
0
0
0
0
0
0
0
Program
A0~A6, 0
0
1
1
0
0
0
0
0
D0~D7
All erase
********
0
0
1
1
0
0
0
0
Busy monitor
********
1
0
1
1
0
0
0
0
Overwrite enable
********
1
0
0
1
0
0
0
0
Overwrite disable
********
1
1
0
1
0
0
0
0
*
: Don’t care
2. Operation Method
Be sure to return
CS
and
CLK
high temporarily before entering instructions.
After
CS
is asserted low,
CLK
becomes effective, acting as a serial transfer synchronizing signal. The
data on DI is latched by a rising edge of
CLK
, while data is output to DO by a falling edge of
CLK
.
Instructions can only be executed when the chip is not being programmed or collectively erased (i.e., when
the ready/busy status signal is high). However, the Busy Monitor instruction can be entered at any time.
Only the commands listed in the above table can be used. Do not use any other command.
(1)
Read
When the Read instruction is entered, memory data at the specified address is read out and is
serially output from the DO pin.
(2)
Program
When the Program instruction is entered, overwrite operation automatically starts internally in the
chip, and memory data at the specified address is overwritten with the input data. After the
instruction is entered,
CS
can be returned high even while overwrite operation is in progress
internally.
(3)
All Erase
When the All Erase instruction is entered, erase operation automatically starts internally in the
chip, and memory data at all addresses are erased. After the instruction is entered,
CS
can be
returned high even while erase operation is in progress internally. Execution of this command clears
the memory data to 0.
(4)
Busy Monitor
When the Busy Monitor instruction is entered, a ready/busy status signal is output from the DO pin.
This output signal is low while the chip is being programmed or collectively erased, and is high after
programming or collective erase operation is completed.
The ready/busy status signal is output continuously until
CS
is returned high.
(5)
Overwrite Enable/Disable
When the Overwrite Enable instruction is entered, the chip is placed in overwrite enable mode,
where the Program and All Erase instructions are enabled. When the Overwrite Disable instruction is
entered, the chip is placed in overwrite disable mode, where the Program and All Erase instructions
both are disabled.
Once the chip is placed in overwrite disable mode, it remains disabled against overwriting unless
the Overwrite Enable instruction is entered.
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