參數(shù)資料
    型號(hào): TC9402EJD
    廠商: Microchip Technology
    文件頁數(shù): 20/28頁
    文件大?。?/td> 545K
    描述: IC V-FREQ/FREQ-V CONV 14CDIP
    標(biāo)準(zhǔn)包裝: 29
    類型: 電壓至頻率和頻率至電壓
    頻率 - 最大: 100kHz
    全量程: ±100ppm/°C
    線性: ±0.25%
    安裝類型: 通孔
    封裝/外殼: 14-CDIP(0.300",7.62mm)
    供應(yīng)商設(shè)備封裝: 14-CERDIP
    包裝: 管件
    TC9400/9401/9402
    DS21483D-page 20
    ?2007 Microchip Technology Inc.
    14-Lead Plastic Dual In-Line (PD)  300 mil Body [PDIP]
    Notes:
    1. Pin 1 visual index feature may vary, but must be located with the hatched area.
    . ?Significant Characteristic.
    . Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side.
    . Dimensioning and tolerancing per ASME Y14.5M.
    BSC: Basic Dimension. Theoretically exact value shown without tolerances.
    Note:  For the most current package drawings, please see the Microchip Packaging Specification located at 
    http://www.microchip.com/packaging
    Units
    INCHES
    Dimension Limits   MIN
    NOM
    MAX
    Number of Pins
    N
    14
    Pitch
    e
    .100 BSC
    Top to Seating Plane
    A
    
    
    .210
    Molded Package Thickness
    A2    .115
    .130
    .195
    Base to Seating Plane
    A1    .015
    
    
    Shoulder to Shoulder Width
    E    .290
    .310
    .325
    Molded Package Width
    E1    .240
    .250
    .280
    Overall Length
    D    .735
    .750
    .775
    Tip to Seating Plane
    L    .115
    .130
    .150
    Lead Thickness
    c    .008
    .010
    .015
    Upper Lead Width
    b1    .045
    .060
    .070
    Lower Lead Width
    b    .014
    .018
    .022
    Overall Row Spacing ?/DIV>
    eB    
    
    .430
    N
    E1
    D
    NOTE 1
    1  2
    3
    E
    c
    eB
    A2
    L
    A
    A1
    b1
    b
    e
    MicrochipTechnologyDrawingC04-005B
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