TC9204M
Preliminary Data Sheet
Table Of Contents
Features..............................................................................................................................................................1
General Description............................................................................................................................................1
Block Diagram.....................................................................................................................................................2
Table Of Contents...............................................................................................................................................3
Revision History..................................................................................................................................................4
Pins Placement...................................................................................................................................................5
1
Pin Listing (PQFP208)................................................................................................................................6
2
Ethernet Media Access Controller............................................................................................................14
2.1
Receive MAC..................................................................................................................... 14
2.2
Transmit MAC.................................................................................................................... 15
3
MAC Address Handling.............................................................................................................................16
4
Queue Management.................................................................................................................................16
5
Classes of Service....................................................................................................................................17
6
Flow Control..............................................................................................................................................19
7
Broadcast Throttling..................................................................................................................................21
8
Port Mirroring.............................................................................................................................................21
9
Physical Layer Configuration / Polling......................................................................................................22
10
EEPROM Interface...................................................................................................................................23
10.1
Reprogramming the EEPROM for reconfiguration ............................................................ 23
10.2
EEPROM Address Map ..................................................................................................... 24
10.3
Register Description........................................................................................................... 26
10.3.1
Validation Register................................................................................................ 26
10.3.2
Port [
X
] Configuration Register............................................................................. 28
10.3.3
Port [
X
] IFG Configuration Register ................................................................... 30
10.3.4
Flow Control Register ........................................................................................... 31
10.3.5
Backpressure Time Value Register....................................................................... 33
10.3.6
Flow Control Port Base Address Register ............................................................ 33
10.3.7
Broadcast Configuration Register......................................................................... 34
10.3.8
IP Priority Mapping Register................................................................................. 35
10.3.9
VLAN Priority Mapping Register........................................................................... 36
10.3.10
CoS Bandwidth Register....................................................................................... 37
10.3.11
Reserved Register................................................................................................ 37
10.3.12
CoS Configuration Register.................................................................................. 38
10.3.13
Port Mirroring Register.......................................................................................... 39
10.3.14
General Configuration Register ............................................................................ 40
10.3.15
Port VLAN Enable Register .................................................................................. 41
10.3.16
VLAN [
Y
] Register................................................................................................. 41
10.4
Writing / Reading PHY management registers via EEPROM interface............................. 42
10.4.1
Data Write Register............................................................................................... 42
10.4.2
Physical Layer Device Address Register.............................................................. 42
10.4.3
Physical Layer’s Register Address Register......................................................... 43
10.4.4
IO Status Control Register.................................................................................. 43
10.4.5
Data Read Register .............................................................................................. 44
11
Timing Requirements................................................................................................................................45
11.1
GMII / MII Receive Timing Requirements.......................................................................... 45
11.2
GMII / MII Transmit Timing................................................................................................. 45
11.3
PHY Management (MDIO) Timing..................................................................................... 46
11.4
EEPROM Timing................................................................................................................ 47
12
Electrical Specifications ............................................................................................................................48
12.1
ABSOLUTE MAXIMUM RATINGS..................................................................................... 48
12.2
RECOMMENDED OPERATING CONDITIONS................................................................ 48
Confidential.
Copyright
2003, IC Plus Corp.
3/49
July 29, 2003
TC9204M-DS-R05