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參數(shù)資料
| 型號(hào)： | TC55V8512J-15 |
| 廠(chǎng)商： | Toshiba Corporation |
| 英文描述： | Paired Cable; Number of Conductors:8; Conductor Size AWG:18; No. Strands x Strand Size:16 x 30; Jacket Material:Polyvinylchloride (PVC); Number of Pairs:4; Leaded Process Compatible:Yes; Voltage Nom.:300V RoHS Compliant: Yes |
| 中文描述： | 東芝馬鞍山數(shù)字集成電路硅柵CMOS |
| 文件頁(yè)數(shù)： | 1/10頁(yè) |
| 文件大小： | 169K |
| 代理商： | TC55V8512J-15 |
TC55V8512J/FT-12,-15
2001-12-19 1/10
Single power supply voltage of 3.3 V
±
0.3 V
Fully static operation
All inputs and outputs are LVTTL compatible
Output buffer control using OE
Package:
SOJ36-P-400-1.27 (J)
TSOP II44-P-400-0.80 (FT)
(Weight: 1.35 g typ)
(Weight: 0.45 g typ)
524,288-WORD BY 8-BIT CMOS STATIC RAM
DESCRIPTION
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
The TC55V8512J/FT is a 4,194,304-bit high-speed static random access memory (SRAM) organized as 524,288
words by 8 bits. Fabricated using CMOS technology and advanced circuit techniques to provide high speed, it
operates from a single 3.3 V power supply. Chip enable (CE) can be used to place the device in a low-power mode,
and output enable (OE ) provides fast memory access. This device is well suited to cache memory applications
where high-speed access and high-speed storage are required. All inputs and outputs are directly LVTTL
compatible. The TC55V8512J/FT is available in plastic 36-pin SOJ and 44-pin TSOP with 400mil width for high
density surface assembly.
FEATURES
Fast access time (the following are maximum values)
TC55V8512J/FT-12:12 ns
TC55V8512J/FT-15:15 ns
Low-power dissipation
(the following are maximum values)
Cycle Time
12
15
20
25
ns
Operation (max) 170 140
130
110
mA
Standby:4 mA (both devices)
PIN ASSIGNMENT
(TOP VIEW)
PIN NAMES
36 PIN SOJ
44 PIN TSOP
A0 to A18
Address Inputs
I/O1 to I/O8
Data Inputs/Outputs
CE
Chip Enable Input
WE
Write Enable Input
OE
Output Enable Input
V
DD
Power (
+
3.3 V)
GND
Ground
NC
No Connection
NU
Not Usable (Input)
(TC55V8512J)
(TC55V8512FT)
A17
A3
A2
A1
A0
CE
I/O1
I/O2
V
GND
I/O3
I/O4
WE
A16
A15
A14
A13
A18
NC
A4
A5
A6
A7
I/O7
GND
V
I/O6
I/O5
A8
A9
A10
A11
A12
NU
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
NC
NC
A17
A3
A2
A1
A0
CE
I/O1
I/O2
V
GND
I/O3
I/O4
WE
A16
A15
A14
A13
A18
NC
NC
NC
NC
NC
A4
A5
A6
A7
I/O7
GND
V
I/O6
I/O5
A8
A9
A10
A11
A12
NU
NC
NC
I/O8
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| TC55V8512FT-12 | TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS |
| TC55V8512FT-15 | TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS |
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| TC55V8512JI-12 | TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TC55V8512JI-12 | 制造商:TOSHIBA 制造商全稱(chēng):Toshiba Semiconductor 功能描述:TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS |
| TC55V8512JI15 | 制造商:TOSHIBA 功能描述:* |
| TC55V8512JI-15 | 制造商:TOSHIBA 制造商全稱(chēng):Toshiba Semiconductor 功能描述:TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS |
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| TC55VBM316AFTN40 | 制造商:TOSHIBA 制造商全稱(chēng):Toshiba Semiconductor 功能描述:TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS |
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