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參數(shù)資料
| 型號(hào)： | TC1322EOART |
| 元件分類(lèi)： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 10 us SETTLING TIME, 12-BIT DAC, PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁(yè)數(shù)： | 6/11頁(yè) |
| 文件大?。?/td> | 65K |
| 代理商： | TC1322EOART |
4
TC1322-1
6/23/00
TC1322
12-Bit Digital-to-Analog Converter
with Two-Wire Interface
2001 Microchip Technology Inc.
DS21388A
SMBUS Write Timing Diagram
SMBUS READ Timing Diagram
TIMING DIAGRAMS
tSU(START) tH(START)
tSU-DATA
tH-DATA
tSU(STOP)
tIDLE
A = Start Condition
B = MSB of Address Clocked into Slave
C = LSB of Address Clocked into Slave
D = R/W Bit Clocked into Slave
E = Slave Pulls SDA Line Low
A
B
CD
E
F
G
H
I
J
KL
M
F = Acknowledge Bit Clocked into Master
G = MSB of Data Clocked into Slave
H = LSB of Data Clocked into Slave
I = Slave Pulls SDA Line Low
J = Acknowledge Clocked into Master
K = Acknowledge Clock Pulse
L = Stop Condition, Data Executed by Slave
M = New Start Condition
ILOW
IHIGH
SCL
SDA
tSU(START)
tH(START)
tSU-DATA
tSU(STOP)
tIDLE
A = Start Condition
B = MSB of Address Clocked into Slave
C = LSB of Address Clocked into Slave
D = R/W Bit Clocked into Slave
A
B
CD
E
F
G
H
IJ
K
E = Slave Pulls SDA Line Low
F = Acknowledge Bit Clocked into Master
G = MSB of Data Clocked into Master
H = LSB of Data Clocked into Master
ILOW
IHIGH
I = Acknowledge Clock Pulse
J = Stop Condition
K = New Start Condition
SCL
SDA
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| TC1322EUART | SERIAL INPUT LOADING, 10 us SETTLING TIME, 12-BIT DAC, PDSO8 |
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| TC1322EUATR | SERIAL INPUT LOADING, 10 us SETTLING TIME, 12-BIT DAC, PDSO8 |
| TC1322EUA | SERIAL INPUT LOADING, 10 us SETTLING TIME, 12-BIT DAC, PDSO8 |
| TC1322EOATR | SERIAL INPUT LOADING, 10 us SETTLING TIME, 12-BIT DAC, PDSO8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
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